参数资料
型号: ATMEGA324PA-MCH
厂商: Atmel
文件页数: 157/160页
文件大小: 0K
描述: MCU AVR 32KB FLASH 44-VQFN
产品培训模块: MCU Product Line Introduction
megaAVR Introduction
标准包装: 490
系列: AVR® ATmega
核心处理器: AVR
芯体尺寸: 8-位
速度: 20MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 32KB(16K x 16)
程序存储器类型: 闪存
EEPROM 大小: 1K x 8
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-VQFN 裸露焊盘
包装: 托盘
配用: ATSTK600-ND - DEV KIT FOR AVR/AVR32
96
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
Figure 15-3. Output Compare unit, block diagram.
The OCR0x Registers are double buffered when using any of the Pulse Width Modulation
(PWM) modes. For the normal and Clear Timer on Compare (CTC) modes of operation, the dou-
ble buffering is disabled. The double buffering synchronizes the update of the OCR0x Compare
Registers to either top or bottom of the counting sequence. The synchronization prevents the
occurrence of odd-length, non-symmetrical PWM pulses, thereby making the output glitch-free.
The OCR0x Register access may seem complex, but this is not case. When the double buffering
is enabled, the CPU has access to the OCR0x Buffer Register, and if double buffering is dis-
abled the CPU will access the OCR0x directly.
15.5.1
Force Output Compare
In non-PWM waveform generation modes, the match output of the comparator can be forced by
writing a one to the Force Output Compare (FOC0x) bit. Forcing Compare Match will not set the
OCF0x Flag or reload/clear the timer, but the OC0x pin will be updated as if a real Compare
Match had occurred (the COM0x1:0 bits settings define whether the OC0x pin is set, cleared or
toggled).
15.5.2
Compare Match Blocking by TCNT0 Write
All CPU write operations to the TCNT0 Register will block any Compare Match that occur in the
next timer clock cycle, even when the timer is stopped. This feature allows OCR0x to be initial-
ized to the same value as TCNT0 without triggering an interrupt when the Timer/Counter clock is
enabled.
15.5.3
Using the Output Compare Unit
Since writing TCNT0 in any mode of operation will block all Compare Matches for one timer
clock cycle, there are risks involved when changing TCNT0 when using the Output Compare
Unit, independently of whether the Timer/Counter is running or not. If the value written to TCNT0
equals the OCR0x value, the Compare Match will be missed, resulting in incorrect waveform
OCFnx (Int.Req.)
= (8-bit Comparator )
OCRnx
OCnx
DATA BUS
TCNTn
WGMn1:0
Waveform Generator
top
FOCn
COMnX1:0
bottom
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