参数资料
型号: ATMEGA324PA-MCH
厂商: Atmel
文件页数: 23/160页
文件大小: 0K
描述: MCU AVR 32KB FLASH 44-VQFN
产品培训模块: MCU Product Line Introduction
megaAVR Introduction
标准包装: 490
系列: AVR® ATmega
核心处理器: AVR
芯体尺寸: 8-位
速度: 20MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 32KB(16K x 16)
程序存储器类型: 闪存
EEPROM 大小: 1K x 8
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-VQFN 裸露焊盘
包装: 托盘
配用: ATSTK600-ND - DEV KIT FOR AVR/AVR32
119
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
(TCNTn) is written to the Input Capture Register (ICRn). The Input Capture Flag (ICFn) is set at
the same system clock as the TCNTn value is copied into ICRn Register. If enabled (ICIEn = 1),
the Input Capture Flag generates an Input Capture interrupt. The ICFn Flag is automatically
cleared when the interrupt is executed. Alternatively the ICFn Flag can be cleared by software
by writing a logical one to its I/O bit location.
Reading the 16-bit value in the Input Capture Register (ICRn) is done by first reading the low
byte (ICRnL) and then the high byte (ICRnH). When the low byte is read the high byte is copied
into the high byte temporary register (TEMP). When the CPU reads the ICRnH I/O location it will
access the TEMP Register.
The ICRn Register can only be written when using a Waveform Generation mode that utilizes
the ICRn Register for defining the counter’s TOP value. In these cases the Waveform Genera-
tion mode (WGMn3:0) bits must be set before the TOP value can be written to the ICRn
Register. When writing the ICRn Register the high byte must be written to the ICRnH I/O location
before the low byte is written to ICRnL.
For more information on how to access the 16-bit registers refer to ”Accessing 16-bit Registers”
16.7.1
Input Capture Trigger Source
The main trigger source for the Input Capture unit is the Input Capture pin (ICPn).
Timer/Counter1 can alternatively use the Analog Comparator output as trigger source for the
Input Capture unit. The Analog Comparator is selected as trigger source by setting the Analog
Comparator Input Capture (ACIC) bit in the Analog Comparator Control and Status Register
(ACSR). Be aware that changing trigger source can trigger a capture. The Input Capture Flag
must therefore be cleared after the change.
Both the Input Capture pin (ICPn) and the Analog Comparator output (ACO) inputs are sampled
using the same technique as for the Tn pin (Figure 16-1 on page 112). The edge detector is also
identical. However, when the noise canceler is enabled, additional logic is inserted before the
edge detector, which increases the delay by four system clock cycles. Note that the input of the
noise canceler and edge detector is always enabled unless the Timer/Counter is set in a Wave-
form Generation mode that uses ICRn to define TOP.
An Input Capture can be triggered by software by controlling the port of the ICPn pin.
16.7.2
Noise Canceler
The noise canceler improves noise immunity by using a simple digital filtering scheme. The
noise canceler input is monitored over four samples, and all four must be equal for changing the
output that in turn is used by the edge detector.
The noise canceler is enabled by setting the Input Capture Noise Canceler (ICNCn) bit in
Timer/Counter Control Register B (TCCRnB). When enabled the noise canceler introduces addi-
tional four system clock cycles of delay from a change applied to the input, to the update of the
ICRn Register. The noise canceler uses the system clock and is therefore not affected by the
prescaler.
16.7.3
Using the Input Capture unit
The main challenge when using the Input Capture unit is to assign enough processor capacity
for handling the incoming events. The time between two events is critical. If the processor has
相关PDF资料
PDF描述
ATMEGA324PA-PU MCU AVR 32KB FLASH 40PDIP
ATSAM3N4AA-MU MCU FLASH 48-QFN
ATMEGA48P-20AU MCU AVR 4K ISP FLSH 20MHZ 32TQFP
ATTINY84-20PU IC MCU AVR 8K FLASH 20MHZ 14-DIP
ATTINY84V-10PU IC MCU AVR 8K FLASH 10MHZ 14-DIP
相关代理商/技术参数
参数描述
ATMEGA324PA-MCHR 功能描述:8位微控制器 -MCU AVR 32KB FLSH 1KB EE 2KB SRAM-20MHz IND RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
ATMEGA324PA-MN 功能描述:8位微控制器 -MCU AVR 32KB FLSH 1KB EE 2KB SRAM-20MHz 105C RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
ATMEGA324PA-MNR 功能描述:20 MHZ, QFP, 105C 制造商:microchip technology 系列:AVR? ATmega 包装:剪切带(CT) 零件状态:在售 核心处理器:AVR 核心尺寸:8-位 速度:20MHz 连接性:I2C,SPI,UART/USART 外设:欠压检测/复位,POR,PWM,WDT I/O 数:32 程序存储容量:32KB(16K x 16) 程序存储器类型:闪存 EEPROM 容量:1K x 8 RAM 容量:2K x 8 电压 - 电源(Vcc/Vdd):1.8 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器类型:内部 工作温度:-40°C ~ 105°C(TA) 封装/外壳:44-VFQFN 裸露焊盘 供应商器件封装:44-VQFN(7x7) 标准包装:1
ATMEGA324PA-MU 功能描述:8位微控制器 -MCU AVR 32KB 1KB EE 20MHz 2KB SRAM 5V RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
ATMEGA324PA-MUR 功能描述:8位微控制器 -MCU AVR 32KB FLSH 1KB EE 2KB SRAM-20MHz IND RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT