参数资料
型号: BD3508EKN-E2
厂商: Rohm Semiconductor
文件页数: 11/16页
文件大小: 0K
描述: IC REG LDO ADJ 20HQFN
标准包装: 2,500
稳压器拓扑结构: 正,可调式
输出电压: 可调
输入电压: 1.2 V ~ 6.5 V
电压 - 压降(标准): 0.065V @ 1A
稳压器数量: 1
电流 - 限制(最小): 3A
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 20-VQFN
供应商设备封装: 20-HQFN
包装: 带卷 (TR)
71.4 ℃ /W 1-layer substrate (bottom layer surface copper foil area 60 × 60mm )
62.5 ℃ /W 2-layer substrate (top layer copper foil area 60 × 60mm )
Substrate size: 70 × 70 × 1.6mm (substrate with thermal via)
● Heat Loss
Thermal design should allow operation within the following conditions. Note that the temperatures listed are the allowed
temperature limits, and thermal design should allow sufficient margin from the limits.
1. Ambient temperature Ta can be no higher than 100 ℃ .
2. Chip junction temperature (Tj) can be no higher than 150 ℃ .
Chip junction temperature can be determined as follows:
① Calculation based on ambient temperature (Ta)
Tj=Ta+ θ j-a × W
< Reference values >
θ j-a:HQFN20V 250.0 ℃ /W Bare (unmounted) IC
166.7 ℃ /W 1-layer substrate (top layer copper foil less than 3%)
2
2
3
It is recommended to layout the VIA for heat radiation in the GND pattern of reverse (of IC) when there is the GND pattern in
the inner layer (in using multiplayer substrate). This package is so small (size: 4.2mm×4.2mm) that it is not available to
layout the VIA in the bottom of IC. Spreading the pattern and being increased the number of VIA like the figure below).
enable to get the superior heat radiation characteristic. (This figure is the image. It is recommended that the VIA size and
the number is designed suitable for the actual situation.).
Most of the heat loss that occurs in the BD3508EKN is generated from the output Nch FET. Power loss is determined by
the total VIN-Vo voltage and output current. Be sure to confirm the system input and output voltage and the output current
conditions in relation to the heat dissipation characteristics of the VIN and Vo in the design. Bearing in mind that heat
dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in the
BD3508EKN) make certain to factor conditions such as substrate size into the thermal design.
Power consumption (W) =
Input voltage (VIN)- output voltage (Vo)
×Io (Ave)
Example) VIN=1.5V, Vo=1.2V, Io(Ave) = 3A
Power consumption (W) = 1.5(V)-1.2(V)
= 0.9(W)
×3.0(A)
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