参数资料
| 型号： | BR34L02FVT-WE2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 7/18页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM I2C SPD 2KB 8-TSSOP |
| 标准包装： | 1 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 2K (256 x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP-B |
| 包装： | 标准包装 |
| 其它名称： | BR34L02FVT-WE2DKR |
BR34L02FV-W
Technical Note
● Data transfer on the I 2 C BUS
○ Data transfer on the I 2 C BUS
The BUS is considered to be busy after the START condition and free a certain time after the STOP condition.
Every SDA byte must be 8-bits long and requires an ACKNOWLEDGE signal after each byte. The devices have Master
and Slave configurations. The Master device initiates and ends data transfer on the BUS and generates the clock signals
in order to permit transfer.
The EEPROM in a slave configuration is controlled by a unique address. Devices transmitting data are referred to as the
Transmitter. The devices receiving the data are called Receiver.
○ START Condition (Recognition of the START bit)
? All commands are proceeded by the start condition, which is a High to Low transition of SDA when SCL is High.
? The device continuously monitors the SDA and SCL lines for the start condition and will not respond to any command
until this condition has been met. (See Fig.1-(b) START/STOP Bit Timing)
○ STOP Condition (Recognition of STOP bit)
? All communications must be terminated by a stop condition, which is a Low to High transition of SDA when SCL is High.
(See Fig.1-(b) START/STOP Bit Timing)
○ Acknowledge
? Acknowledge is a software used to indicate successful data transfers. The Transmitter device will release the BUS after
transmitting eight bits. When inputting the slave address during write or read operation, the Transmitter is the μ-COM.
When outputting the data during read operation, the Transmitter is the EEPROM.
? During the ninth clock cycle the Receiver will pull the SDA line Low to verify that the eight bits of data have been
received. (When inputting the slave address during write or read operation, EEPROM is the receiver. When outputting
the data during read operation the receiver is the μ-COM.)
? The device will respond with an Acknowledge after recognition of a START condition and its slave address (8bit).
? In WRITE mode, the device will respond with an Acknowledge after the receipt of each subsequent 8-bit word (word
address and write data).
? In READ mode, the device will transmit eight bits of data, release the SDA line, and monitor the line for an Acknowledge.
? If an Acknowledge is detected and no STOP condition is generated by the Master, the device will continue to transmit
the data. If an Acknowledge is not detected, the device will terminate further data transmissions and await a STOP
condition before returning to standby mode.
○ Device Addressing
? Following a START condition, the Master outputs the Slave address to be accessed. The most significant four bits
of the slave address are the “device type indentifier.” For this EEPROM it is “1010.” (For WP register access this code
is "0110".)
? The next three bits identify the specified device on the BUS (device address). The device address is defined by the state
of the A0,A1 and A2 input pins. This IC works only when the device address input from the SDA pin corresponds to the
status of the A0,A1 and A2 input pins. Using this address scheme allows up to eight devices to be connected to the
BUS. The last bit of the stream (R/W … READ/WRITE) determines the operation to be performed.
R/W=0
R/W=1
WRITE (including word address input of Random Read)
READ
Device Type
Device Address
Read Write
Mode
Access Area
1010 A2 A1 A0
R/W
Access to Memory
0110 A2 A1 A0 R/W Access to Write Protect Register
○ Write Protect command
The Write Protect command cancels any write commands that access addresses 00 ～ 7Fh.
The Write Protect Register can be written to once (One time Rom).
Once this command is excuted, the data is protected forever.
○ Write Protect Pin (WP)
When the WP pin set to Vcc (H level), write protect is set for 256 words (all addresses). WP pin set to GND (L level)
enables writing of 256 words (all addresses).
If permanent protection is implemented by the Write Protect command, writing is prohibited in the the lower half area
(addresses 00 ～ 7Fh) regardless of the WP pin status.
The WP pin has a pulldown resistor. Please leave unconnected or connect to GND when not in use.
www.rohm.com
? 2009 ROHM Co., Ltd. All rights reserved.
7/17
2009.04 - Rev.A
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相关代理商/技术参数 |
参数描述 |
|---|---|
| BR34L02FVT-WSE2 | 制造商:ROHM Semiconductor 功能描述:IC EEPROM |
| BR34L02FV-W | 制造商:ROHM 制造商全称:Rohm 功能描述:DDR1/DDR2 For memory module) SPD Memory |
| BR34L02FV-W_09 | 制造商:ROHM 制造商全称:Rohm 功能描述:DDR1/DDR2 For memory module) SPD Memory |
| BR34L02FV-WE2 | 功能描述:电可擦除可编程只读存储器 SRL 256X8 BIT RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| BR34L02-W | 制造商:ROHM 制造商全称:Rohm 功能描述:2Kbit Serial I2C BUS EEPROM For SPD DRAM Memory Module |
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