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参数资料
| 型号： | BU-61840B3-100L |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
| 封装： | 0.815 X 0.815 INCH, 0.140 INCH HEIGHT, BGA-128 |
| 文件页数： | 41/60页 |
| 文件大小： | 763K |
| 代理商： | BU-61840B3-100L |
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46
Data Device Corporation
www.ddc-web.com
BU-6174X/6184X/6186X
D-03/02-250
A11
3
Lower 12 bits of 16-bit bi-directional address bus. In both the buffered
and transparent modes, the host CPU accesses the Enhanced Mini-
ACE registers and internal RAM by means of A11 - A0 (4K version).
For the 64K versions, A15 - A12 are also used for this purpose.
In buffered mode, A12-A0 (or A15-A0) are inputs only. In the
transparent mode, A12-A0 (or A15-A0) are inputs during CPU
accesses and become outputs, driving outward (towards the CPU)
when the 1553 protocol/memory management logic accesses up
to 64K words of external RAM.
In transparent mode, the address bus is driven outward only when
the signal DTACK is low (indicating that the Enhanced Mini-ACE has
control of the RAM interface bus) and IOEN is high, indicating a
non-host access. Most of the time, including immediately after power
turn-on, A12-A0 (or A15-A0) will be in high impedance (input) state.
B7
A10
4
A6
A9
69
B6
A8
6
B5
A7
11
A5
A6
22
A4
A5
68
B4
A4
9
A3
10
B3
A2
12
A2
A1
27
B1
A0 (LSB)
15
A1
TABLE 50. PROCESSOR ADDRESS BUS (CONT.)
SIGNAL NAME
DESCRIPTION
BU-6186XFX/GX
BU-6184XFX/GX
BU-6174XFX/GX
BALL
PIN
4K RAM
64K RAM
BU-61860BX
BU-61840BX
BU-61740BX
A12 / RTBOOT
70
For BU-6186X (64K RAM versions), this signal is always config-
ured as address line A12. Refer to the description for A11-A0
below.
For BU-6184X/6174X (4K RAM versions), if UPADDREN is con-
nected to logic "1", this signal operates as A12.
For BU-6184X/6174X (4K RAM versions), if UPADDREN is con-
nected to logic "0", then this signal functions as RTBOOT.If
RTBOOT is connected to logic "0", the Enhanced Mini-ACE will ini-
tialize in RT mode with the Busy status word bit set following
power turn-on. If RTBOOT hardwired to logic "1", the Enhanced
Mini-ACE will initialize in either Idle mode (for an RT-only part), or
in BC mode (for a BC/RT/MT part).
A7
A12
相关PDF资料 |
PDF描述 |
|---|---|
| BU-61840B3-300Y | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
| BU-61860B3-102 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
| BU-61860B3-402W | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
| BU-61860B4-100Z | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
| BU-61860B4-200S | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| BU-61840B3NEW | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MIL-STD-1553 Components |μ-ACE (Micro-ACE?) |
| BU-61843 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MIL-STD-1553 Components |Enhanced Mini-ACE? |
| BU-61843F3-100 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Telecommunication IC |
| BU-61843F3-110 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Telecommunication IC |
| BU-61843F4-100 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Telecommunication IC |
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