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参数资料
| 型号： | BU9829GUL-WE2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 15/26页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 16KBIT SPI 9VCSP |
| 标准包装： | 1 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 16K (2K x 8) |
| 速度： | 5MHz |
| 接口： | SPI 串行 |
| 电源电压： | 1.6 V ~ 3.6 V |
| 工作温度： | -30°C ~ 85°C |
| 封装/外壳： | 9-UFBGA，WLCSP |
| 供应商设备封装： | 9-VCSP50L1（1.6x1.6） |
| 包装： | 标准包装 |
| 其它名称： | BU9829GUL-WE2DKR |
BU9829GUL-W (16Kbit)
Datasheet
6.WRSR (WRITE STATUS RESISTER)
This “Write Status Register” command writes the data, two (BP1, BP0) of the eight bits, into the status register. Write
protection is set by BP1 and BP0 bits. After CSB goes low, Op.code of “Read Status Register” need to sent. Between the
rising edge of the 15th clock and it or the 16th clock, the rising edge of CSB initiates high voltage cycle, which writes the
data into non-volatile memory array, but the command is cancelled if CSB is high except that period. It takes maximum
5ms in high voltage cycle (tE/W) as well as “Write”. Block write protection is determined by BP1 and BP0 bits, which is
selected from quarter, half and the entire memory array. (Refer to BLOCK WRITE PROTECTION of Page 13.)
CSB
SCK
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Bit7 Bit6
Bit5
Bit4 Bit3
Bit2
Bit1 Bit0
SI
0
0
0
0
0
1
0
1
*
*
*
*
BP1
BP0
*
*
SO
Hi-Z
* Don’t care
Figure 36. WRITE STATUS REGISTER WRITE CYCLE TIMING
7. VSET READ
The VSET data stored in the memory are clocked out after “VSET Read” instruction set address 800h is received.
After CSB goes low, the address (800h) need to be sent following by Op.code of “Read”. 0 are clocked out from D7 to D2
and the VSET data are clocked out from D1 to D0, which is start at the falling edge of 23th clock.
CSB
SCK
0
1
2
3
4
5
6
7
8
12
13
23
24
30
SI
0
0
0
0
0
0
1
1
*
*
1
0
0
0
SO
Hi-Z
0
0
0
0
VSET
1
VSET
0
Figure 37. VSET READ CYCLE TIMIING
* Don’t care
8. VSET WRITE
This “Write” command set address 800h writes VSET data into VSET1 and VSET0 memory array. After CSB goes low,
the address (800h) and VSET data need to be sent following by Op.code of “VSET Write”. Between the rising edge of the
29th clock and it of the 30th clock, the rising edge of CSB initates high voltage cycle, which writes the data into
non-volatile memory array, but the command is cancelled if CSB is high except that period. It takes maximum 5ms in high
voltage cycle (tE/W). The device does not receive any command except for “Read Status Register” command during this
high voltage cycle.
CSB
SCK
0
1
2
3
4
5
6
7
8
12
13
23
24
30
31
SI
0
0
0
0
0
0
1
0
*
*
1
0
0
0
0
*
*
*
*
VSET
1
VSET
0
SO
Hi-Z
Figure 38. VSET WRITE CYCLE TIMING
* Don’t care
www.rohm.com
? 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
15/23
TSZ02201-0R2R0G100400-1-2
28.AUG.2012 Rev.001
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相关代理商/技术参数 |
参数描述 |
|---|---|
| BU9831 | 制造商:ROHM 制造商全称:Rohm 功能描述:Non-volatile electronic potentiometer |
| BU9831F | 制造商:ROHM 制造商全称:Rohm 功能描述:Non-volatile electronic potentiometer |
| BU9832GUL-W | 制造商:ROHM 制造商全称:Rohm 功能描述:WL-CSP EEPROM family SPI BUS |
| BU9832GUL-W_10 | 制造商:ROHM 制造商全称:Rohm 功能描述:WL-CSP EEPROM family SPI BUS |
| BU9832GUL-WE2 | 功能描述:电可擦除可编程只读存储器 电可擦除可编程只读存储器 Serial-SPI 8Kb RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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