参数资料
型号: BU9880GUL-WE2
厂商: Rohm Semiconductor
文件页数: 19/25页
文件大小: 0K
描述: IC EEPROM 64KBIT 2WIRE VCSP50L1
标准包装: 3,000
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 64K (8K x 8)
速度: 400kHz
接口: I²C,2 线串口
电源电压: 1.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 6-UFBGA,CSPBGA
供应商设备封装: VCSP50L1
包装: 带卷 (TR)
BU9880GUL-W (64Kbit)
Datasheet
● I 2 C BUS input / output circuit
○ Input (A0, A1, A2, SCL, SDA)
Figure 45. Input pin circuit diagram
○ Input/Output (SDA)
Figure 46. Input /output pin circuit diagram
● Notes on power ON
At power on, in IC internal circuit and set, Vcc rises through unstable low voltage area, and IC inside is not completely reset,
and malfunction may occur. To prevent this, functions of POR circuit and LVCC circuit are equipped. To assure the action,
observe the following condition at power on.
1. Set SDA = 'H' and SCL ='L' or 'H'
2. Start power source so as to satisfy the recommended conditions of tR, tOFF, and Vbot for operating POR circuit.
tR
V CC
Recommended conditions of t R , t OFF , Vbot
0
tOFF
Vbot
t R
10ms or below
t OFF
10ms or higher
Vbot
0.3V or below
Figure 47.
Rise waveform diagram
100ms or below
10ms or higher
0.2V or below
3. Set SDA and SCL so as not to become 'Hi-Z'.
When the above conditions 1 and 2 cannot be observed, take the following countermeasures.
a) In the case when the above conditions 1 cannot be observed. When SDA becomes 'L' at power on .
→ Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'.
V CC
tLOW
SCL
SDA
After V CC becomes stable
After V CC becomes stable
tDH
tSU:DAT
tSU:DAT
Figure 48. When SCL='H' and SDA='L'
Figure 49. When SCL='H' and SDA='L'
b) In the case when the above condition 2 cannot be observed.
→ After power source becomes stable, execute software reset(Page 16).
c) In the case when the above conditions 1 and 2 cannot be observed.
→ Carry out a), and then carry out b).
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? 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
19/22
TSZ02201-0R2R0G100340-1-2
21.AUG.2012 Rev.001
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