Datasheet
17
Electrical Specifications
2.4
Voltage Identification
The VID specification for the Celeron D processor in the 775-land package is supported by the
Voltage Regulator Down (VRD) 10.1 Design Guide For Desktop LGA775 Socket. The voltage set
by the VID signals is the maximum voltage allowed by the processor. A minimum voltage is
provided in
Table 2-8 and changes with frequency. This allows processors running at a higher
frequency to have a relaxed minimum voltage specification. The specifications have been set such
that one voltage regulator can work with all supported frequencies.
Individual processor VID values may be calibrated during manufacturing such that two devices at
the same speed may have different VID settings.
The Celeron D processor in the 775-land package uses six voltage identification signals, VID[5:0],
to support automatic selection of power supply voltages.
Table 2-2 specifies the voltage level
corresponding to the state of VID[5:0]. A ‘1’ in this table refers to a high voltage level and a ‘0’
refers to low voltage level. If the processor socket is empty (VID[5:0] = x11111), or the voltage
regulation circuit cannot supply the voltage that is requested, it must disable itself. See the Voltage
Regulator Down (VRD) 10.1 Design Guide For Desktop LGA775 Socket for more details.
Power source characteristics must be guaranteed to be stable when the supply to the voltage
regulator is stable.
The LL_ID[1:0] lands are used by the platform to configure the proper loadline slope for the
processor. LL_ID[1:0] = 00 for the Celeron D processor in the 775-land package.
The VTT_SEL land is used by the platform to configure the proper VTT voltage level for the
processor. VTT_SEL = 1 for the Celeron D processor in the 775-land package.
The GTLREF_SEL signal is used by the platform to select the appropriate chipset GTLREF level.
GTLREF_SEL = 0 for the Celeron D processor in the 775-land package.
The VID_SELECT signal is used by the platform to select the VID table that is to be used by the
voltage regulator.
LL_ID[1:0], VTT_SEL, GTLREF_SEL, and VID_SELECT are signals that are implemented on
the processor package. That is they are either connected directly to VSS or are open lands.