参数资料
| 型号： | CC-ACC-ADD-2443 |
| 厂商： | Digi International |
| 文件页数： | 38/148页 |
| 文件大小： | 0K |
| 描述： | BRD AUDIO ADD-0N CC 2443 KIT |
| 标准包装： | 1 |
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JTAG
Common features
The standard JTAG signals are provided at the system connector. A JTAG/Multi-ICE
connector has to be provided at the base board for debugging.
The signal DEBUGEN# (CONF0) from the base board to the module is necessary, to
be able to switch on and off a connection between the system reset and the JTAG
reset.
The pull-up resistors, belonging to the JTAG interface, are placed on the module.
The LCD controller has a dedicated DMA that supports to fetch the image data from
video buffer located in system memory. Its features also include:
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Dedicated interrupt functions (INT_FrSyn and INT_FiCnt)
The system memory is used as the display memory
Supports Multiple Virtual Display Screen (Supports Hardware
Horizontal/Vertical Scrolling)
Programmable timing control for different display panels
Supports little and big-endian byte ordering, as well as WinCE data formats
Watchdog timer
The S3C2443 watchdog timer is used to resume the controller operation whenever it
is disturbed by malfunctions such as noise and system errors. It can be used as a
normal 16-bit interval timer to request interrupt service. The watchdog timer
generates the reset signal for 128 PCLK cycles.
Features:
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16-bit Watchdog Timer
Interrupt request or system reset at time-out
The prescaler value and the frequency division factor are specified in the watchdog
timer control (WTCON) register. Valid prescaler values range from 0 to 28-1. The
frequency division factor can be selected as 16, 32, 64, or 128.
Use the following equation to calculate the watchdog timer clock frequency and the
duration of each timer clock cycle:
t_watchdog = 1/(PCLK / (Prescaler value + 1) / Division_factor)
IIS-Bus interface
IIS (Inter-IC Sound) interface transmits or receives sound data from or to external
stereo audio code cs. For transmit and receive data, two 32x16 FIFOs (First-In-First-
Out) data structures are included and DMA transfer mode for transmitting or
receiving samples can be supported. IIS-specific clock can be supplied from internal
system clock controller through IIS clock divider or direct clock source.
Features:
www.digiembedded.com
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1-ch IIS-bus for audio interface with DMA-based operation
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