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参数资料
| 型号： | CDB5529 |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 5/31页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR CS5529 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 303 |
| 数据接口： | 串行 |
| 输入范围： | ±2.5 V |
| 在以下条件下的电源（标准）： | 2.6mW @ 2.5V |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | CS5529 |
| 已供物品： | 板，线缆，磁盘 |
| 产品目录页面： | 755 (CN2011-ZH PDF) |
| 相关产品： | CS5529-ASZR-ND - IC ADC 16BIT W/6BIT LATCH 20SSOP 598-1110-5-ND - IC ADC 16BIT W/6BIT LATCH 20SSOP |
| 其它名称： | 598-1015 |
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CS5529
DS246F5
13
SYNC1
Part of the serial port re-initialization sequence (see text for use of command).
SYNC0
End of the serial port re-initialization sequence.
Read/Write Registers
These commands are used to perform a write to or a read from a specific register. The register to be accessed is
selected with the RSB2-RSB0 bits of the command word.
R/W
0
Write Register
1
Read Register
RSB[4:0]
Register address binary encoded 0 to 31 as follows. All registers are 24 bits long.
Address
Description
000
Read or Write Offset Register
001
Read or Write Gain Register
010
Read or Write Configuration Register
011
Read Conversion Data Register
100
Read or Write Offset Gain and Configuration Registers in
this sequence (i.e. one 8-bit command is followed by 72-bits of
data to access the Offset, then the Gain, and then the
Configuration register)
Serial Port Interface
The CS5529’s serial interface consists of four con-
trol lines: CS, SDI, SDO, and SCLK.
CS, Chip Select, is the control line which enables
access to the serial port. If the CS pin is tied to logic
0, the port can function as a three wire interface.
SDI, Serial Data In, is the data signal used to trans-
fer data to the converters.
SDO, Serial Data Out, is the data signal used to
transfer output data from the converters. The SDO
output will be held at high impedance any time CS
is at logic 1.
SCLK, Serial Clock, is the serial bit-clock which
controls the shifting of data to or from the ADC’s
serial port. The CS pin must be held at logic 0 be-
fore SCLK transitions can be recognized by the
port logic. To accommodate opto-isolators SCLK
is designed with a Schmitt-trigger input to allow an
opto-isolator with slower rise and fall times to di-
rectly drive the pin. Additionally, SDO is capable
of sinking or sourcing up to 5 mA to directly drive
an opto-isolator LED. SDO will have less than a
400 mV loss in the drive voltage when sinking or
sourcing 5 mA.
Figure 4 illustrates the serial sequence necessary to
write to, or read from the serial port’s registers. A
transfer of data is always initiated by sending the
appropriate 8-bit command (MSB first) to the serial
port (SDI pin). It is important to note that some
commands use information from the configuration
registers to perform the function. For those com-
mands it is important that the correct information is
written to the configuration register first.
7
654
32
10
1
111
11
7
654
32
10
1
111
11
10
7
654
32
10
10
0
R/W
RSB2
RSB1
RSB0
0
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| CDB5534U-Z | 功能描述:EVAL BD 24-BIT ADCS W/ULTRALN PG 制造商:cirrus logic inc. 系列:- 零件状态:在售 A/D 转换器数:1 位数:24 采样率（每秒）:3.84k 数据接口:串行 输入范围:±2.5 V 不同条件下的功率（典型值）:35mW @ 3.84kSPS 使用的 IC/零件:CS5534 所含物品:板，电缆 标准包装:1 |
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