参数资料
型号: CDB8422
厂商: Cirrus Logic Inc
文件页数: 9/46页
文件大小: 0K
描述: BOARD EVAL FOR CS8422 RCVR
标准包装: 1
主要目的: 音频,采样率转换器
嵌入式: 是,FPGA / CPLD
已用 IC / 零件: CS8422
主要属性: PCM,IEC-60958,AES3/EBU,S/PDIF,以及 XLR 输入,RCA 同轴和光学 S/PDIF 输出
次要属性: 28 ~ 216 kHz 采样率范围,输入/输出率范围从 6:1 至 1:6
已供物品:
产品目录页面: 759 (CN2011-ZH PDF)
相关产品: 598-1732-ND - IC SAMPLE RATE CONVERTER 32QFN
其它名称: 598-1568
CDB8422
2.2.3
PCM In to S/PDIF and PCM Out
The CS8422’s serial input port and SRC output performance can be tested by loading the “PCM In to
SPDIF and PCM Out” quick setup file provided with the software package. The script configures the dig-
ital clock and data signal routing on the board as shown in Figure 4 .
PCM audio input is provided by the PCM input header J22. The jumper position on J23 may be changed
to use the MCLK signal from J22 for the CS8422’s XTI signal. The script configures the CS8422’s internal
circuitry to send the input audio data through its SRC to serial output port 1. This data is presented as
PCM audio at header J24 and S/PDIF audio at J27 (coaxial) and J28 (optical). The input data is also
passed through (SRC is bypassed) to serial output port 2. This data is presented as PCM audio at header
J25. Refer to Section 2.3 for details on software configuration.
Header
J24
Y1
J23
OSCLK1
OLRCK1
SDOUT1
MCLK OUT
PCM Out
through SRC
Optical
S/PDIF
PCM In
Header
J22
MCLK
ISCLK
ILRCK
Buffer
XTI
OSCLK1
(MASTER) OLRCK1
SDOUT1
CS8422
ISCLK
ILRCK (SLAVE) RMCK
Buffer
Buffer
CS8406
S/PDIF Tx
ISCLK
ILRCK (SLAVE) OUT
SDIN
OMCK
J31
J28
J27
S/PDIF
Out
AND
Coaxial
S/PDIF
SDIN
SDIN
Buffer
Header
J25
Out
MCLK OUT
PCM Out
OSCLK2
(MASTER) OLRCK2
SDOUT2
OSCLK2
OLRCK2
SDOUT2
no SRC
Figure 4. PCM In to S/PDIF and PCM Out
DS692DB2
9
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