参数资料
| 型号： | CDP68HC68T1MZ96 |
| 厂商： | Intersil |
| 文件页数： | 13/23页 |
| 文件大小： | 0K |
| 描述： | IC RTC RAM/SPI SERIAL 20-SOIC |
| 标准包装： | 1,000 |
| 类型： | 时钟/日历 |
| 特点： | 警报器，闰年，方波输出，监视计时器 |
| 存储容量： | 32B |
| 时间格式： | HH:MM:SS（12/24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | SPI |
| 电源电压： | 3 V ~ 6 V |
| 电压 - 电源，电池： | 2.2 V ~ 6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC W |
| 包装： | 带卷 (TR) |
20
FN1547.8
October 29, 2007
Example of an automotive system. The VSYS and LINE inputs can be used to sense the ignition turning on and off. An
external switch is included to activate the system without turning on the ignition. Also, the CMOS CPU is not powered down
with the system VDD, but is held in a low power reset mode during power down. When restoring power the CDP68HC68T1
will enable the CLK OUT pin and set the PSE and CPUR high.
Important Application Note: Those units with a code of 6PG have delayed alarm interrupts of 8.3ms regardless of
CDP68HC68T1’s operating frequency. (See "Functional Description", INT on page 10.) In addition, reading the Status
Register before delayed alarm activates will disable alarm signal.
FIGURE 19. AUTOMOTIVE SYSTEM DIAGRAM
System Diagrams (Continued)
XTAL
LINE
VDD
VSYS
VBATT
POR
2MHz
PSE
CPUR
CLK OUT
SPI
CE
INT
T1
VSS
VDD
RESET
OSC1
IRQ
SPI
PORT
CDP68HC05C4B
VSS
PORT
5V
REG
+
-
12V
IGNITION
3
CLOCK BUTTON
ENABLED POWER
CDP68HC68T1
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CDP68HC68T1W | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CMOS Serial Real-Time Clock With RAM and Power Sense/Control |
| CDP68HC68T1W WAF | 制造商:Harris Corporation 功能描述: |
| CDP68HC68T2D | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| CDP68HC68T2E | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| CDP68HC68T2M | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
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