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参数资料
| 型号： | CH7303 |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Chrontel CH7303 HDTV / DVI Encoder |
| 中文描述： | 昆泰CH7303的HDTV / DVI译码器 |
| 文件页数： | 5/15页 |
| 文件大小： | 330K |
| 代理商： | CH7303 |
CHRONTEL
CH7303
209-0000-031
Rev. 0.4,
8/26/2002
5
2.0 Functional Description
2.1
TV Output Operation
The CH7303 is capable of being operated as in one of several bypass modes for driving monitors requiring component
video signals (HDTV, multi-sync monitors, etc.). All modes make use of the same set of DAC’s, and therefore cannot
be used simultaneously. Table 2 describes the possible operating modes. A ‘p’ following a number in the Input Scan
Type column indicates a progressive scan (non-interlaced) input where the number indicates the active number of lines
per frame. An ‘i’ following a number in the Input Scan Type column indicates an interlaced input where the number
indicates the active number of lines per frame. Detailed descriptions of each of the operating modes follows Table 2.
Table 2: Operating Modes
Input Scan
Type
Format
Type
Format
non-interlaced
non-interlaced
(480p, 576p,
720p)
Interlaced
(1080i)
YCrCb
1
non-interlaced
(1080p)
YCrCb
1
2.1.1
HDTV / EDTV Bypass
In HDTV / EDTV Bypass mode, data, sync and clock signals are input to the CH7303 from a graphics device in the
scanning method that matches the display device (interlaced data is sent to the CH7303 to drive an interlaced display,
non-interlaced data is sent to the CH7303 to drive a non-interlaced display). The input data format can be YCrCb or
RGB. Horizontal and vertical sync signals must either be sent to the CH7303 from the graphics device or embedded in
the data stream according to SMPTE standards. Data is 2X multiplexed, and the XCLK clock signal can be 1X or 2X
times the pixel rate. Input data is color space converted to the selected video format, has sync signals generated and is
output from the video DAC’s. The output format is YPbPr. The graphics resolutions supported for HDTV Bypass mode
are shown in Table 3 below. The resolutions supported for EDTV Bypass mode are shown in Table 3 below.
Table 3: HDTV Bypass
Active
Resolution
Resolution
(MHz)
1280x720
1650x750
Non-Interlaced
74.25
74.25/1.001
1280x720
1648x750
Non-Interlaced
74.160
1920x1080
2200x1125
Interlaced
74.25
74.25/1.001
1920x1080
2640x1125
Interlaced
74.25
1920x1080
2376x1250
Interlaced
74.25
1920x1080
2200x1125
Non-Interlaced
148.5
148.5/1.001
74.25
74.25/1.001
1920x1080
2640x1125
Non-Interlaced
148.5
74.25
1920x1080
2750x1125
Non-Interlaced
74.25
74.25/1.001
1920x1080
2752x1125
Non-Interlaced
74.304
1920x1080
2376x1250
Non-Interlaced
148.5
Input Data
Output scan
Output
Operating Mode
RGB
non-interlaced
RGB
RGB bypass
RGB /
YCrCb
1
non-interlaced
YpbPr
2,3
HDTV/EDTV bypass
RGB /
interlaced
YpbPr
3
HDTV/EDTV bypass
(1080i)
HDTV/EDTV bypass
(1080p)
RGB /
non-interlaced
YpbPr
3
Total
Scan Type
Pixel Clock
Frame Rate
(Hz)
60
60/1.001
60
30
30/1.001
25
25
60
60/1.001
30
30/1.001
50
25
24
24/1.001
24
50
Standard
SMPTE 296M
SMPTE 274M
SMPTE 274M
SMPTE 295M
SMPTE 274M
SMPTE 274M
SMPTE 274M
SMPTE 295M
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