参数资料
| 型号： | CMPWR150SF |
| 厂商： | ON Semiconductor |
| 文件页数： | 2/10页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 3.3V .5A SOIC8 |
| 产品变化通告： | Product Discontinuation 30/Sept/2011 |
| 标准包装： | 2,500 |
| 系列： | SmartOR™ |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 3.3V |
| 输入电压： | 4.5 V ~ 5.5 V |
| 稳压器数量： | 1 |
| 电流 - 输出： | 500mA（最小值） |
| 电流 - 限制（最小）： | 500mA |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 带卷 (TR) |
CMPWR150
TYPICAL APPLICATION CIRCUIT
3.3 V
V CC
SIMPLIFIED ELECTRICAL SCHEMATIC
V AUX
?
+
FDN338P
(Si2310DS)
CMPWR150
+
-
Controller
Drive
5V
V CC +
?
+ C IN
1 m F
V CC
Drive
V OUT
GND
+ C OUT
V OUT
3.3 V/500 mA
GND
Deselect
4.1 V
V REF
3.3 V
+
-
En
RegAmp
3.3 V/500 mA
V OUT
10 m F
PACKAGE / PINOUT DIAGRAM
Top View
N.C.
V CC
V OUT
DRIVE
1
2
3
4
8
7
6
5
GND
GND
GND
GND
8 ? Pin SOIC
CMPWR150
Table 1. PIN DESCRIPTIONS
Pin(s)
1
2
3
4
5 ? 8
Name
N.C.
V CC
V OUT
DRIVE
GND
Description
This is a no ? connect pin.
V CC is the power source for the internal regulator and is monitored continuously by an internal controller
circuit. Whenever V CC exceeds V CCSEL (4.35 V typically), the internal regulator (500 mA max) will be enabled
and deliver a fixed 3.3 V at V OUT . When V CC falls below V CCDES (4.10 V typically) the regulator will be
disabled. Internal loading on this pin is typically 1.0 mA when the regulator is enabled, which decreases to
0.15 mA whenever the regulator is disabled. If V CC falls below the voltage on the V OUT pin the V CC loading
will further decrease to only a few microamperes. During a V CC power up sequence, there will be an effective
step increase in V CC line current when the regulator is enabled. The amplitude of this step increase will
depend on the DC load current and any necessary current required for charging/discharging the load
capacitance. This line current transient will cause a voltage disturbance at the V CC pin. The magnitude of the
disturbance will be directly proportional to the effective power supply source impedance being delivered to the
V CC input. To prevent chatter during Select and Deselect transitions, a built ? in hysteresis voltage of 250 mV
has been incorporated. It is recommended that the power supply connected to the V CC input have a source
resistance of less than 0.25 W to minimize the event of chatter during the enabling/disabling of the regulator.
An input filter capacitor in close proximity to the V CC pin will reduce the effective source impedance and help
minimize any disturbances. If the V CC pin is within a few inches of the main input filter, a capacitor may not be
necessary. Otherwise an input filter capacitor in the range of 1 m F to 10 m F will ensure adequate filtering.
V OUT is the regulator output voltage connection used to power the load. An output capacitor of ten
microfarads is used to provide the necessary phase compensation, thereby preventing oscillation. The
capacitor also helps to minimize the peak output disturbance during power supply changeover.
When V CC falls below V OUT , then V OUT will be used to provide the necessary quiescent current for the
internal reference circuits. This ensures excellent start ? up characteristics for the regulator.
DRIVE is an active LOW logic output intended to be used as the control signal for driving an external PFET
whenever the regulator is disabled. This will allow the voltage at V OUT to be powered from an auxiliary supply
voltage (3.3 V).
The Drive pin is pulled HIGH to V CC whenever the regulator is enabled. This ensures that the auxiliary
remains isolated during normal regulator operation.
GND is the negative reference for all voltages. The current that flows in the ground connection is very low
(typically 1.0 mA) and has minimal variation over all load conditions.
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