参数资料
型号: COP8SG-EPU
厂商: National Semiconductor
文件页数: 32/55页
文件大小: 0K
描述: BOARD PROTOTYPE/TARGET COP8
标准包装: 1
系列: COP8™
类型: MCU
适用于相关产品: Cop 8
所含物品:
相关产品: COP8SGR728M7-ND - MCU 8BIT CMOS ROM OTP 28-SOIC
COP8SGR744V8-ND - IC MCU 8BIT CMOS OTP 44PLCC
COP8SGR728N8/NOPB-ND - IC MCU 8BIT CMOS OTP 28DIP
COP8SGR728M8-ND - IC MCU 8BIT CMOS OTP 28SOIC
COP8SGE7VEJ8-ND - IC MCU 8BIT CMOS OTP 44LQFP
COP8SGE744V8/NOPB-ND - IC MCU 8BIT CMOS OTP 44PLCC
COP8SGE728N8-ND - IC MCU 8BIT CMOS OTP 28DIP
COP8SGE728M8/NOPB-ND - IC MCU 8BIT CMOS OTP 28SOIC
Comparators
(Continued)
bit are associated with each comparator. The comparator re-
sult bits (CMP1RD and CMP2RD) are read only bits which
I2
I1
Comparator1 positive input
Comparator1 negative input
will read as zero if the associated comparator is not enabled.
The Comparator Select Register is cleared with reset, result-
Only Comparator 1 is available on the CS series.
A Comparator Select Register (CMPSL) is used to enable
the comparators, read the outputs of the comparators inter-
nally, and enable the outputs of the comparators to the pins.
Two control bits (enable and output enable) and one result
CMPSL REGISTER (ADDRESS X’00B7)
ing in the comparators being disabled. The comparators
should also be disabled before entering either the HALT or
IDLE modes in order to save power. The configuration of the
CMPSL register is as follows:
Reserved
CMP20E
CMP2RD
CMP2EN
CMP10E
CMP1RD
CMP1EN
Reserved
Bit 7
The CMPSL register contains the following bits:
Reserved These bits are reserved and must be zero
CMP20E Selects pin I6 as comparator 2 output provided
that CMP2EN is set to enable the comparator
CMP2RD Comparator 2 result (this is a read only bit, which
will read as 0 if the comparator is not enabled)
CMP2EN Enable comparator 2
CMP10E Selects pin I3 as comparator 1 output provided
that CMPIEN is set to enable the comparator
CMP1RD Comparator 1 result (this is a read only bit, which
will read as 0 if the comparator is not enabled)
CMP1EN Enable comparator 1
Note: For compatibility with existing code and with existing Mask ROMMed
devices the bits of the CMPSL register will take precedence over the
associated Port F configuration and data output bits.
Bit 0
Interrupts
INTRODUCTION
Each device supports thirteen vectored interrupts. Interrupt
sources include Timer 0, Timer 1, Timer 2, Timer 3, Port L
Wakeup, Software Trap, MICROWIRE/PLUS, and External
Input.
All interrupts force a branch to location 00FF Hex in program
memory. The VIS instruction may be used to vector to the
appropriate service routine from location 00FF Hex.
The Software trap has the highest priority while the default
VIS has the lowest priority.
Each of the 13 maskable inputs has a fixed arbitration rank-
ing and vector.
Figure 16 shows the Interrupt Block Diagram.
DS012829-42
FIGURE 16. Interrupt Block Diagram
31
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相关代理商/技术参数
参数描述
COP8SGR728M7 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
COP8SGR728M7/NOPB 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
COP8SGR728M8 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
COP8SGR728M8/NOPB 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
COP8SGR728N8 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT