参数资料
| 型号： | CS5165AGDW16 |
| 厂商： | ON Semiconductor |
| 文件页数： | 14/18页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR BUCK SYNC 5BIT 16-SOIC |
| 产品变化通告： | Product Obsolescence 11/Feb/2009 Product Obsolescence 30/Dec/2003 |
| 标准包装： | 47 |
| 应用： | 控制器，Intel Pentium? II |
| 输入电压： | 8 V ~ 14 V |
| 输出数： | 2 |
| 输出电压： | 1.34 V ~ 2.09 V，2.14 V ~ 3.54 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC W |
| 包装： | 管件 |
CS5165A
Schottky Diode for Synchronous FET
For synchronous operation, a Schottky diode may be placed
@ 2.2 V
in parallel with the synchronous FET to conduct the inductor
current upon turn off of the switching FET to improve
efficiency. The CS5165A reference circuit does not use this
device due to it’s excellent design. Instead, the body diode of
the synchronous FET is utilized to reduce cost and conducts the
inductor current. For a design operating at 200 kHz or so, the
low non?overlap time combined with Schottky forward
recovery time may make the benefits of this device not worth
the additional expense. The power dissipation in the
synchronous MOSFET due to body diode conduction can be
estimated by the following equation:
Trace 1 = GATE(H) (5.0 V/div.)
Power + VBD
ILOAD
conduction time
switching frequency
1.35 * 1.15 + 16%
Trace 2 = GATE(L) (5.0 V/div.)
Figure 27. Normal Operation Showing the Guaranteed
Non?Overlap Time Between the High and Low?Side
MOSFET Gate Drives, I LOAD = 14 A
The CS5165A provides adaptive control of the external
NFET conduction times by guaranteeing a typical 65 ns
non?overlap between the upper and lower MOSFET gate drive
pulses. This feature eliminates the potentially catastrophic
effect of “shoot?through current”, a condition during which
both FETs conduct causing them to overheat, self?destruct, and
possibly inflict irreversible damage to the processor.
The most important aspect of FET performance is RDS ON ,
which effects regulator efficiency and FET thermal
management requirements.
The power dissipated by the MOSFETs may be estimated as
follows:
Switching MOSFET:
Power + ILOAD2 RDSON duty cycle
Synchronous MOSFET:
Power + ILOAD2 RDSON (1 * duty cycle)
Duty Cycle =
VOUT ) (ILOAD RDSON OF SYNCH FET)
Where V BD = the forward drop of the MOSFET body
diode. For the CS5165A demonstration board:
Power + 1.6 V 14.2 A 100 ns 200 kHz + 0.45 W
This is only 1.1% of the 40 W being delivered to the load.
“Droop” Resistor for Adaptive Voltage Positioning
Adaptive voltage positioning is used to help keep the output
voltage within specification during load transients. To
implement adaptive voltage positioning a “Droop Resistor”
must be connected between the output inductor and output
capacitors and load. This resistor carries the full load current
and should be chosen so that both DC and AC tolerance limits
are met. An embedded PC trace resistor has the distinct
advantage of near zero cost implementation. However, this
droop resistor can vary due to three reasons: 1) the sheet
resistivity variation causes the thickness of the PCB layer to
vary. 2) the mismatch of L/W, and 3) temperature variation.
1. Sheet Resistivity for one ounce copper, the thickness
variation typically 1.15 mil to 1.35 mil. Therefore the
error due to sheet resistivity is:
1.25
2. Mismatch due to L/W. The variation in L/W is
governed by variations due to the PCB manufacturing
process that affect the geometry and the power
VIN ) (ILOAD
RDSON OF SYNCH FET)
dissipation capability of the droop resistor. The error
* (ILOAD
RDSON OF SWITCH FET)
due to L/W mismatch is typically 1.0%.
3. Thermal Considerations. Due to I 2 × R power losses
Off Time Capacitor (C OFF )
The C OFF timing capacitor sets the regulator off time:
the surface temperature of the droop resistor will
increase causing the resistance to increase. Also, the
ambient temperature variation will contribute to the
TOFF + COFF
4848.5
increase of the resistance, according to the formula:
The preceding equations for duty cycle can also be used
to calculate the regulator switching frequency and select the
C OFF timing capacitor:
R + R20[1 ) a 20(T * 20)]
where:
R 20 = resistance at 20 ° C
a + 0.00393
where:
COFF +
Perioid
(1 * duty cycle)
4848.5
° C
T = operating temperature
Period +
1
switching frequency
R = desired droop resistor value
For temperature T = 50 ° C, the % R change = 12%
http://onsemi.com
14
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相关代理商/技术参数 |
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| CS5165AGDW16G | 功能描述:DC/DC 开关控制器 5-Bit Synchronous Dual N-Channel Buck RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| CS5165AGDWR16 | 功能描述:DC/DC 开关控制器 5-Bit Synchronous RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| CS5165AGDWR16G | 功能描述:DC/DC 开关控制器 ANA BUCK SYNC 5BIT CNTRLR RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| CS-5165DW16 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Voltage-Mode SMPS Controller |
| CS-5165DWR16 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Voltage-Mode SMPS Controller |
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