参数资料
型号: CS61884-IB
厂商: CIRRUS LOGIC INC
元件分类: 数字传输电路
英文描述: Octal T1/E1/J1 Line Interface Unit
中文描述: DATACOM, PCM TRANSCEIVER, PBGA160
封装: FBGA-160
文件页数: 29/72页
文件大小: 1474K
代理商: CS61884-IB
CS61884
DS485PP4
29
12. OPERATIONAL SUMMARY
A brief summary of the CS61884 operations in hardware and host mode is provided in
Table 7
.
Table 7. Operational Summary
12.1 Loopbacks
The CS61884 provides three loopback modes for
each port. Analog Loopback connects the transmit
signal on TTIP and TRING to RTIP and RRING.
Digital Loopback Connects the output of the En-
coder to theinput of the Decoder (throughthe Jitter
Attenuator if enabled). Remote Loopback connects
theoutput of the Clock and Data Recovery block to
the input of the Pulse Shaper block. (Refer to de-
tailed descriptions below.) In hardware mode, the
LOOP[7:0] pins are used to activate Analog or Re-
mote loopback for each channel. In host mode, the
Analog,DigitalandRemoteLoopback registersare
used to enablethesefunctions (Refer to the
Analog
Loopback Register (01h)
(See Section 14.2 on
page 35),
Remote Loopback Register (02h)
(See
Section 14.3 on page 35), and
Digital Loopback
Reset Register (0Ch)
(See Section 14.13 on
page 37).
12.2 Analog Loopback
In
Analog
TTIP/TRING driver is internally connected to the
input of the RTIP/RRING receiver so that the data
on TPOS/TNEG and TCLK appears on the
RPOS/RNEG and RCLK outputs. In this mode the
RTIP and RRING inputs are ignored. Refer to
Figure 8 on page 30
. In hardware mode, Analog
Loopback is selected by driving LOOP[7:0] high.
In host mode, Analog Loopback is selected for a
given channel using the appropriate bit in the
Ana-
log Loopback Register (01h)
(SeeSection 14.2 on
page 35).
Loopback,
the
output
of
the
NOTE:
The simultaneous selection of Analog and
Remote loopback modes is not valid. A TAOS
request overrides the data on TPOS and TNEG
during Analog Loopback. Refer to
Figure 9 on
page 30
.
MCLK
Active
Active
Active
Active
Active
Active
Active
L
L
L
H
H
H
H
H
H
H
H
H
TCLK
Active
Active
Active
L
H
H
H
Active
H
L
Active
Active
Active
L
L
L
H
H
H
LOOP
Open
L
H
X
Open
L
H
X
X
X
Open
L
H
Open
L
H
Open
L
H
Receive Mode
RCLK/Data Recovery
RCLK/Data Recovery
RCLK/Data Recovery
RCLK/Data Recovery
RCLK/Data Recovery
RCLK/Data Recovery
RCLK/Data Recovery
Power Down
Power Down
Power Down
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Transmit Mode
Unipolar/Bipolar
Unipolar/Bipolar
Unipolar/Bipolar
Power Down
TAOS
Unipolar/Bipolar
TAOS
Unipolar/Bipolar
RZ Data
Power Down
Unipolar/Bipolar
RZ Data
Unipolar/Bipolar
Power Down
RZ Data
Power Down
RZ Data
RZ Data
RZ Data
Loopback
Disabled
Remote Loopback
Analog Loopback
Disabled
Disabled
Remote Loopback
Analog Loopback
Disabled
Disabled
Disabled
Disabled
Remote Loopback
Analog Loopback
Disabled
Remote Loopback
Disabled
Disabled
Remote Loopback
Analog Loopback
相关PDF资料
PDF描述
CS61884-IQ Octal T1/E1/J1 Line Interface Unit
CS62180A Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
CS62180 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
CS62180B Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
CS62180B-IL Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相关代理商/技术参数
参数描述
CS61884-IQ 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:Octal T1/E1/J1 Line Interface Unit
CS61884-IQZ 功能描述:网络控制器与处理器 IC IC Octal T1/E1/J1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
CS61884-IQZR 功能描述:网络控制器与处理器 IC IC Octal T1/E1/J1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
CS61884-IRZ 功能描述:网络控制器与处理器 IC IC Octal T1/E1/J1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
CS61884-IRZR 功能描述:网络控制器与处理器 IC IC Octal T1/E1/J1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray