参数资料
型号: CS61884-IB
厂商: CIRRUS LOGIC INC
元件分类: 数字传输电路
英文描述: Octal T1/E1/J1 Line Interface Unit
中文描述: DATACOM, PCM TRANSCEIVER, PBGA160
封装: FBGA-160
文件页数: 30/72页
文件大小: 1474K
代理商: CS61884-IB
CS61884
30
DS485PP4
12.3 Digital Loopback
Digital Loopback causes the TCLK, TPOS, and
TNEG (or TDATA) inputs to be looped back
through the jitter attenuator (if enabled) to the
RCLK, RPOS, and RNEG (or RDATA) outputs.
The receive line interface is ignored, but data at
TPOS and TNEG (or TDATA) continues to be
transmitted to the line interface at TTIP and
TRING (Refer to
Figure 10 on page 31
).
Digital Loopback is only available during host
mode. It is selected using the appropriate bit in the
Digital Loopback ResetRegister(0Ch)
(See Sec-
tion 14.13 on page 37).
NOTE:
TAOS can also be used during the Digital Loop-
back operation for the selected channel (Refer
to
Figure 11 on page 31
).
12.4 Remote Loopback
In remote loopback, the RPOS/RNEG and RCLK
outputs are internally input to the transmit circuits
for output on TTIP/TRING. In this mode the
TCLK,TPOSand TNEGinputsareignored.(Refer
to
Figure 12 on page 31
)
.
In hardware mode, Re-
mote Loopback is selected by driving the LOOP
pinforacertain channel low.Inhostmode,Remote
Loopbackis selectedfor agivenchannel bywriting
a one to the appropriate bit in the
Remote Loop-
back Register (02h)
(See Section 14.3 on
page 35).
NOTE:
In hardware mode, Remote Loopback over-
rides TAOS for the selected channel. In host
mode, TAOS overrides Remote Loopback.
E
D
TTIP
TRING
RTIP
RRING
TNEG
TCLK
RNEG
RCLK
TPOS
RPOS
Clock Recovery &
Data Recovery
Transmit
Control &
Pulse Shaper
J
A
J
A
Figure 8. Analog Loopback Block Diagram
E
D
TNEG
TCLK
RNEG
RCLK
TPOS
RPOS
TAOS
MCLK
(All One's)
TTIP
TRING
RTIP
RRING
Clock Recovery &
Data Recovery
Transmit
Control &
Pulse Shaper
J
A
J
A
Figure 9. Analog Loopback with TAOS Block Diagram
相关PDF资料
PDF描述
CS61884-IQ Octal T1/E1/J1 Line Interface Unit
CS62180A Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
CS62180 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
CS62180B Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
CS62180B-IL Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相关代理商/技术参数
参数描述
CS61884-IQ 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:Octal T1/E1/J1 Line Interface Unit
CS61884-IQZ 功能描述:网络控制器与处理器 IC IC Octal T1/E1/J1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
CS61884-IQZR 功能描述:网络控制器与处理器 IC IC Octal T1/E1/J1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
CS61884-IRZ 功能描述:网络控制器与处理器 IC IC Octal T1/E1/J1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
CS61884-IRZR 功能描述:网络控制器与处理器 IC IC Octal T1/E1/J1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray