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参数资料
| 型号： | CS6403-IL |
| 厂商： | CIRRUS LOGIC INC |
| 元件分类： | 编解码器 |
| 英文描述： | Echo-Cancelling Codec |
| 中文描述： | A/MU-LAW, PCM CODEC, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 26/54页 |
| 文件大小： | 761K |
| 代理商： | CS6403-IL |
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Automatic Gain Control (AGC)
By default, automatic gain-control is provided in
the far-end receive path (see Figure 3). This
AGC provides dynamic gain changes to keep the
signal strength at the near-end output the same
for weak and strong far-end input signals. The
AGC may be disabled either via AGCD:
SSI_CR1.10, or by setting the volume control to
level 10.
Real-time controls
The GPIN pins allow real-time control over
common functions such as mute, volume control,
half-duplex control, and echo canceller status.
GPIN3 controls the microphone gain stage status
at reset and mute after reset (see Table 4).
GPIN2, GPIN1, and GPIN0 work in concert to
implement volume control, half-duplex dis-
able/enable, and filter coefficient control.
GPIN3
GPIN3 controls two chip functions: microphone
gain stage and mute. Immediately after reset,
GPIN3 is sampled and, if high, the 26dB micro-
phone gain stage is disabled. With the
microphone gain disabled, full scale input is 1
Vp. With the microphone gain enabled, full scale
is 50 mVp.
1 ms after reset, a change in the state of GPIN3
will mute the transmit path (send all zeroes out
SDO), and set the receive path full on. So, if
GPIN3 was high at reset, setting it low will mute
the microphone. Restoring the state of GPIN3
will unmute the microphone.
GPIN2/1/0
GPIN2/1/0 act in concert to encode eight states
as described by Table 5 in the pin description
section. These pins are meant to be driven by a
microcontroller or other digital device to allow
user control of the echo canceller. To enter a
state, the user must apply the appropriate value
at GPIN2/1/0 for 375
μ
S (3 samples) before the
change will take effect. For example, to increase
the SPKROUT volume by one step, GPIN2/1/0
needs to be: 110. Applying 110 to GPIN2/1/0
for 375
μ
S (or longer) will cause the volume to
be raised by 3dB. To again raise the volume by
3dB, the system would have to change state
away from 110 to another state for 375
μ
S (100
is a don’t care state), then switch back to 110 for
at least 375
μ
S.
Half-Duplex Disable (011,111)
In some applications, the half-duplex mode of
the CS6403 may be unnecessary or undesirable.
In these cases, the GPIN pins may be used to
disable the half-duplex mode by setting
GPIN2/1/0 to either 011 or 111.
Half-Duplex Enable (000)
This state is on by default when the CS6403 is
reset. If the half- duplex mode is disabled using
the 011 or 111 setting, it can be restored by set-
ting GPIN2/1/0 to 000.
Clear Coefficients (001)
Clearing the coefficients of the adaptive filter ef-
fectively disables the echo canceller. This will
force the CS6403 to operate in half- duplex
mode unless half-duplex mode is disabled as de-
scribed above. Clear Coefficients is maintained
only as long as 001 is applied to the GPIN2/1/0
pins.
GPIN3
(at reset)
0
0
1
1
GPIN3
(1ms after reset)
0
1
0
1
Action
26 dB enable, no mute
26 dB enable, mute
26 dB disable, mute
26 dB disable, no mute
Table 4. Mute Controls.
CS6403
26
DS192PP6
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS6403-IQ | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:Echo-Cancelling Codec |
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| CS6410-000 | 制造商:TE Connectivity 功能描述:MT-LWA-.188-X-STK |
| CS6410AM | 制造商:Cypress Semiconductor 功能描述: |
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