参数资料
| 型号： | CS8952-IQZ |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 17/81页 |
| 文件大小： | 0K |
| 描述： | IC TXRX 100/10 PHY 100TQFP |
| 标准包装： | 90 |
| 类型： | 收发器 |
| 规程： | MII |
| 电源电压： | 4.75 V ~ 5.25 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-LQFP |
| 供应商设备封装： | 100-TQFP（14x14） |
| 包装： | 托盘 |
| 产品目录页面： | 759 (CN2011-ZH PDF) |
| 其它名称： | 598-1208 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页当前第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页
CS8952
CrystalLAN 100BASE-X and 10BASE-T Transceiver
24
DS206F1
Manchester Encoder and Decoder. Selection is
made via:
-
setting bit 14 in the Basic Mode Control
Register (address 00h) or
-
setting bits 8 and 11 in the Loopback, By-
pass, and Receiver Error Mask Register
(address 18h) or
-
asserting the LPBK pin.
3.1.3.7
Carrier Detection
The carrier detect circuit informs the MAC that val-
id receive data is present by asserting the Carrier
Sense signal (CRS) as soon it detects a valid bit pat-
tern (1010b or 0101b for 10BASE-T). During nor-
mal packet reception, CRS remains asserted while
the frame is being received, and is de-asserted
within 2.3 bit times after the last low-to-high tran-
sition of the End-of-Frame (EOF) sequence. When-
ever the receiver is idle (no receive activity), CRS
is de-asserted.
3.1.4
10BASE-T Serial Application
This mode is selected when pin 10BT_SERis as-
serted during power-up or reset, and operates simi-
lar to the 10BASE_T MII mode except that data is
transferred serially on pins RXD0 and TXD0 using
a 10 MHz RX_CLK and TX_CLK. Receive data is
framed by CRS rather than RX_DV.
3.2
Auto-Negotiation
The CS8952 supports auto-negotiation, which is
the mechanism that allows the two devices on ei-
ther end of an Ethernet link segment to share infor-
mation and automatically configure both devices
for maximum performance. When configured for
auto-negotiation, the CS8952 will detect and auto-
matically operate full-duplex at 100 Mb/s if the de-
vice on the other end of the link segment also
supports full-duplex, 100 Mb/s operation, and
auto-negotiation. The CS8952 auto-negotiation ca-
pability is fully compliant with the relevant por-
tions of section 28 of the IEEE 802.3u standard.
The CS8952 can auto-negotiate both operating
speed (10 versus 100 Mb/s), duplex mode (half du-
plex versus full duplex), and flow control (pause
frames), or alternatively can be set not to negotiate.
At power-up and reset times, the auto-negotiation
mode is selected via the auto-negotiation input pins
(AN[1:0]). This selection can later be changed us-
ing the Auto-Negotiation Advertisement Register
(address 04h).
Pins AN[1:0] are three level inputs, and have the
function shown in Table 5.
相关PDF资料 |
PDF描述 |
|---|---|
| CY8CLED04DOCD1-56LTXI | IC POWERPSOC DEBUG 4CH 1A 56VQFN |
| CYG2217 | IC MOD PHONE LINE WIRE 1.07" PCB |
| DAC312ER | IC DAC 12BIT MULT HS 20-CDIP |
| DAC8143FPZ | IC DAC 12BIT DAISYCHAIN 16DIP |
| DAC8228FSZ | IC DAC 8BIT DUAL V-OUT 20SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CS8952-IQZR | 功能描述:以太网 IC IC 100BASE-TX and 10BASE-T Transceiver RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| CS8952T | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-CQ | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-IQ | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-IQR | 制造商:Cirrus Logic 功能描述:ETHERNET TXRX SGL CHIP 1-PORT 5V 10MBPS/100MBPS 100TQFP - Tape and Reel |
发布紧急采购，3分钟左右您将得到回复。