参数资料
| 型号： | CS8952-IQZ |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 51/81页 |
| 文件大小： | 0K |
| 描述： | IC TXRX 100/10 PHY 100TQFP |
| 标准包装： | 90 |
| 类型： | 收发器 |
| 规程： | MII |
| 电源电压： | 4.75 V ~ 5.25 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-LQFP |
| 供应商设备封装： | 100-TQFP（14x14） |
| 包装： | 托盘 |
| 产品目录页面： | 759 (CN2011-ZH PDF) |
| 其它名称： | 598-1208 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页当前第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页
CS8952
CrystalLAN 100BASE-X and 10BASE-T Transceiver
55
DS206F1
6.17
Loopback, Bypass, and Receiver Error Mask Register - Address 18h
15
14
13
12
11
10
9
8
Bad SSD
Enable
Bypass 4B5B
Bypass
Scrambler
Bypass
Symbol
Alignment
ENDEC
Loopback
FX Drive
Remote
Loopback
PMD
Loopback
7
654
32
10
Strip Preamble
Alternate FDX
CRS
Loopback
Transmit
Disable
Code Error
Report Select
Premature End
Error Report
Select
Link Error
Report Enable
Packet Error
Report Enable
Code Error
Report Enable
BIT
NAME
TYPE
RESET
DESCRIPTION
15
Bad SSD Enable
Read/Write 1
When set, this bit enables the reporting of a bad SSD
(False-Carrier event) on the MII. These events will be
reported by setting RX_ER=1, RX_DV=0, and
RXD[3:0]=1110.
If the 4B5B encoders are being bypassed, this event
will be reported by setting RX_DV=0 and
RXD[4:0]=11110. If symbol alignment is bypassed,
the CS8952 does not detect carrier, and thus will not
report bad SSD events.
14
Bypass 4B5B
Read/Write Reset to the value
on the BP4B5B
pin.
When set, this bit causes the receive 5B4B decoder
and the transmit 4B5B encoder to be bypassed.
13
Bypass Scrambler
Read/Write Reset to the value
on the BPSCR
pin.
When set, this bit causes the receive descrambler
and the transmit scrambler blocks to be bypassed,
and the CS8952 accepts NRZI data from an external
100BASE-FX optical module through pins RX_NRZ+
and RX_NRZ-.
12
Bypass Symbol
Alignment
Read/Write Reset to the value
on the BPALIGN
pin.
When set, this bit causes the following functions to
be bypassed: receiver descrambling, symbol align-
ment and decoding, transmit symbol encoding, and
transmit scrambling.
11
ENDEC Loopback
Read/Write 0
When set, the 10BASE-T internal Manchester
encoder output is connected to the decoder input.
When clear, the CS8952 is configured for normal
operation.
10
FX Drive
Read/Write 0
This bit controls the drive strength of the 100BASE-
FX PECL interface drivers. When clear, the drivers
are optimized for a 50
load. When set, the drivers
are optimized for a 150
load.
9
Remote Loopback
Read/Write 0
When set, data received from the link is looped back
at the MII and sent back out to the link. Received
data will be presented on the MII pins. Transmit data
at the MII will be ignored.
Note: Setting Remote Loopback and PMD Loopback
simultaneously will cause neither loopback mode to
be entered, and should not be done.
相关PDF资料 |
PDF描述 |
|---|---|
| CY8CLED04DOCD1-56LTXI | IC POWERPSOC DEBUG 4CH 1A 56VQFN |
| CYG2217 | IC MOD PHONE LINE WIRE 1.07" PCB |
| DAC312ER | IC DAC 12BIT MULT HS 20-CDIP |
| DAC8143FPZ | IC DAC 12BIT DAISYCHAIN 16DIP |
| DAC8228FSZ | IC DAC 8BIT DUAL V-OUT 20SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CS8952-IQZR | 功能描述:以太网 IC IC 100BASE-TX and 10BASE-T Transceiver RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| CS8952T | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-CQ | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-IQ | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:100BASE E-X AND 10BASE-T TRANSCEIVER |
| CS8952T-IQR | 制造商:Cirrus Logic 功能描述:ETHERNET TXRX SGL CHIP 1-PORT 5V 10MBPS/100MBPS 100TQFP - Tape and Reel |
发布紧急采购，3分钟左右您将得到回复。