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参数资料
| 型号： | CY28548ZXC |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 24/30页 |
| 文件大小： | 0K |
| 描述： | IC CLK CK505 960M/965M 64TSSOP |
| 标准包装： | 28 |
| 类型： | 时钟/频率发生器 |
| PLL： | 是 |
| 主要目的： | Intel CPU 服务器 |
| 输入： | 时钟 |
| 输出： | LVCMOS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 3:22 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 400MHz |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-TFSOP （0.240"，6.10mm 宽） |
| 供应商设备封装： | 64-TSSOP |
| 包装： | 管件 |
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CY28548
......................Document #: 001-08400 Rev ** Page 30 of 30
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Sil-
icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or
parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, repre-
sentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized appli-
cation, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Package Diagrams
64-Lead Thin Shrunk Small Outline Package (6 mm x 17 mm) Z64
64-Lead QFN 9 x 9 mm (Punch Version) LF64A
1.10[0.043]
0.05[0.002]
0.85[0.033]
SEATING
PLANE
1
0.50[0.020]
8.00[0.315]
0.25[0.010]
6.20[0.244]
16.90[0.665]
8.20[0.322]
6.00[0.236]
0.95[0.037]
0.50[0.020]
BSC
17.10[0.673]
0.15[0.006]
0.75[0.027]
0°-8°
DIMENSIONS IN MM MIN.
MAX.
0.17[0.006]
0.27[0.010]
GAUGE PLANE
0.20[0.008]
64
0.10[0.004]
0.20[0.008]
32
33
REFERENCE JEDEC MO-153
Z6424
STANDARD PKG.
LEAD FREE PKG.
ZZ6424
PART #
2
1
PIN1 ID
0.80 DIA.
3
2
C
PLANE
SEATING
N
A
0.20[0.008] REF.
0.05[0.002] MAX.
0.80[0.031] MAX.
1.00[0.039] MAX.
C
0.08[0.003]
1
N
0.20[0.008] R.
9.10[0.358]
8.90[0.350]
8.80[0.346]
8.70[0.342]
8.80[0.346]
8.70[0.342]
9.10[0.358]
8.90[0.350]
0°-12°
0.28[0.011]
0.18[0.007]
0.30[0.012]
0.50[0.020]
7.55[0.297]
7.45[0.293]
0.45[0.018]
0.60[0.024]
0.24[0.009]
(4X)
BY DEVICE TYPE)
(PAD SIZE VARY
E-PAD
TOP VIEW
SIDE VIEW
BOTTOM VIEW
REFERENCE JEDEC MO-220
WEIGHT: 0.2 GRAMS
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CY28548ZXCT | 功能描述:时钟发生器及支持产品 Intel 960/965M Crest line CK505 Intg Vreg RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| CY28551 | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:Universal Clock Generator for Intel, VIA, and SIS㈢ |
| CY28551-3 | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:Universal Clock Generator for Intel, VIA and SIS㈢ |
| CY28551LFXC | 功能描述:时钟发生器及支持产品 Universal System Clk Intel AMD SiS Via RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| CY28551LFXC-3 | 功能描述:时钟发生器及支持产品 Universal System Clk Intel AMD SiS Via RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
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