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参数资料
| 型号： | DC1472A |
| 厂商： | Linear Technology |
| 文件页数： | 10/24页 |
| 文件大小： | 0K |
| 描述： | BOARD DEMO LTM4618 |
| 软件下载： | LTM4618 Spice Model |
| 设计资源： | DC1472A Design Files DC1472A Schematic |
| 标准包装： | 1 |
| 系列： | µModule® |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 1.2V，1.5V，1.8V，2.5V，3.3V，5V |
| 电流 - 输出： | 6A |
| 输入电压： | 4.5 ~ 26.5 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 500kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTM4618 |
| 相关产品： | LTM4618IV#PBF-ND - IC DC-DC UMODULE BUCK 6A 84-LGA LTM4618EV#PBF-ND - IC DC-DC UMODULE BUCK 6A 84-LGA |
| 其它名称： | DC1472 DC1472-ND |
LTM4618
APPLICATIONS INFORMATION
The typical LTM4618 application circuit is shown in
Figure 21. External component selection is primarily
determined by the maximum load current and output
voltage.
V IN to V OUT Step-Down Ratios
There are restrictions in the maximum V IN to V OUT step-
down ratio that can be achieved for a given input voltage.
One of the restrictions is the minimum on-time t ON(MIN) ,
which is the smallest time duration that the LTM4618 can
operate. Make sure that the operating on-time is larger than
the minimum on-time as shown in the equation below. See
the Thermal Considerations and Output Current Derating
sections in this data sheet for the current restrictions.
t ON(MIN) is approximately 90ns, guardband to 110ns.
Input Capacitors
The LTM4618 module should be connected to a low AC-
impedance DC source. One 1.5μF input ceramic capacitor
is included inside the module. Additional input capacitors
are only needed if a large load step is required up to
the 6A level. A 47μF to 100μF surface mount aluminum
electrolytic bulk capacitor can be used for more input bulk
capacitance. This bulk input capacitor is only needed if
the input source impedance is compromised by long in-
ductive leads, traces or not enough source capacitance.
If low impedance power planes are used, then this 47μF
capacitor is not needed.
For a buck converter, the switching duty-cycle can be
estimated as:
t ON(MIN) <
V OUT
V IN ? ?
D =
V OUT
V IN
Without considering the inductor current ripple, the RMS
Output Voltage Programming
current of the input capacitor can be estimated as:
The PWM controller has an internal 0.8V reference voltage.
As shown in the Block Diagram, a 60.4k internal feedback
resistor connects V OUT to the V FB pin. Adding a resistor R FB
I CIN(RMS) =
I OUT(MAX)
η
? D ? (1 – D)
from the V FB pin to SGND programs the output voltage:
In the above equation, η is the estimated ef?ciency of
V OUT = 0.8V ?
60.4k + R FB
R FB
the power module. One 10μF ceramic input capacitor is
typically rated for 2A of RMS ripple current, so the RMS
input current at the worst case 6A maximum current is
Table 1. V FB Resistor Table vs Various Output Voltages
V OUT (V) 0.8 1 1.2 1.5 1.8 2.5 3.3
R FB (k Ω ) Open 243 121 69.8 48.7 28.7 19.1
5
11.5
about 3A. If a low inductance plane is used to power the
device, then two 10μF ceramic capacitors are enough for
the output at 6A load and no external input bulk capacitor
is required. The input RMS ripple current can be cancelled
by paralleling multiple LTM4618 power modules out of
phase, allowing the use of fewer input capacitors. Ap-
plication Note 77 explains the details.
4618fa
10
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