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参数资料
| 型号： | DC746A |
| 厂商： | Linear Technology |
| 文件页数： | 9/36页 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2412 |
| 软件下载： | QuikEval System |
| 设计资源： | DC746A Design File DC746A Schematic |
| 标准包装： | 1 |
| 系列： | QuikEval™ |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 7.5 |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 工作温度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2412 |
| 已供物品： | 板 |
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LTC2412
17
2412f
APPLICATIO S I FOR ATIO
WU
U
anytime a LOW-to-HIGH transition is detected at the CS
pin after the converter has entered the data output state
(i.e., after the first rising edge of SCK occurs with
CS = LOW).
Finally, CS can be used to control the free-running modes
of operation, see Serial Interface Timing Modes section.
Grounding CS will force the ADC to continuously convert
at the maximum output rate selected by FO.
SERIAL INTERFACE TIMING MODES
The LTC2412’s 3-wire interface is SPI and MICROWIRE
compatible. This interface offers several flexible modes of
operation. These include internal/external serial clock,
2- or 3-wire I/O, single cycle conversion and autostart. The
following sections describe each of these serial interface
timing modes in detail. In all these cases, the converter
can use the internal oscillator (FO = LOW or FO = HIGH) or
an external oscillator connected to the FO pin. Refer to
Table 4 for a summary.
External Serial Clock, Single Cycle Operation
(SPI/MICROWIRE Compatible)
This timing mode uses an external serial clock to shift out
the conversion result and a CS signal to monitor and
control the state of the conversion cycle, see Figure 5.
The serial clock mode is selected on the falling edge of CS.
To select the external serial clock mode, the serial clock pin
(SCK) must be LOW during each CS falling edge.
Figure 5. External Serial Clock, Single Cycle Operation
Table 4. LTC2412 Interface Timing Modes
Conversion
Data
Connection
SCK
Cycle
Output
and
Configuration
Source
Control
Waveforms
External SCK, Single Cycle Conversion
External
CS and SCK
Figures 5, 6
External SCK, 2-Wire I/O
External
SCK
Figure 7
Internal SCK, Single Cycle Conversion
Internal
CS
↓
CS
↓
Figures 8, 9
Internal SCK, 2-Wire I/O, Continuous Conversion
Internal
Continuous
Internal
Figure 10
EOC
BIT 31
SDO
SCK
(EXTERNAL)
CS
TEST EOC
SUB LSB
MSB
SIG
CH0/CH1
BIT 0
LSB
BIT 5
BIT 27
BIT 26
BIT 28
BIT 29
BIT 30
SLEEP
TEST EOC
(OPTIONAL)
DATA OUTPUT
CONVERSION
2412 F05
CONVERSION
Hi-Z
TEST EOC
= 50Hz REJECTION
= EXTERNAL OSCILLATOR
= 60Hz REJECTION
VCC
VCC
FO
REF+
SCK
CH1+
CH1–
SDO
GND
CS
114
2
3
13
6
7
12
8, 9, 10, 15, 16
11
REFERENCE
VOLTAGE
0.1V TO VCC
CH0+
CH0–
4
5
ANALOG INPUT RANGE
–0.5VREF TO 0.5VREF
1
F
2.7V TO 5.5V
LTC2412
3-WIRE
SPI INTERFACE
REF–
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