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| 型号： | DK-NIOS-2S60N |
| 厂商： | Altera |
| 文件页数： | 16/56页 |
| 文件大小： | 0K |
| 描述： | NIOS II KIT W/STRATIX II EP2S60N |
| 标准包装： | 1 |
| 系列： | Stratix® II |
| 类型： | Nios?II |
| 适用于相关产品： | Stratix ll 2S60N |
| 所含物品： | 评估板，设计应用程序，软件，线缆和配件 |
| 相关产品： | 544-1906-ND - IC STRATIX II FPGA 60K 484-FBGA 544-1907-ND - IC STRATIX II FPGA 60K 484-FBGA 544-1908-ND - IC STRATIX II FPGA 60K 484-FBGA 544-1910-ND - IC STRATIX II FPGA 60K 484-FBGA 544-1912-ND - IC STRATIX II FPGA 60K 672-FBGA 544-1913-ND - IC STRATIX II FPGA 60K 672-FBGA 544-1914-ND - IC STRATIX II FPGA 60K 672-FBGA 544-1916-ND - IC STRATIX II FPGA 60K 672-FBGA 544-1915-ND - IC STRATIX II FPGA 60K 672-FBGA 544-1909-ND - IC STRATIX II FPGA 60K 484-FBGA 更多... |
| 其它名称： | 544-1697 |
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Stratix II Device (U60)
Table 2–2. Stratix II Device Features (Part 2 of 2)
Feature
18-bit x 18-bit multipliers
Enhanced PLLS
Fast PLLs
User I/O pins
EP2S30
64
2
4
500
EP2S60
144
4
8
492
The development board provides two separate methods for configuring
the Stratix II device:
1.
2.
Using the Quartus II software running on a host computer, a
designer configures the device directly via an Altera ? download
cable connected to the Stratix II JTAG header (J24).
When power is applied to the board, a configuration controller
device (U3) attempts to configure the Stratix II device with
hardware configuration data stored in flash memory. For more
information on the configuration controller, see “Configuration
Controller Device (U3)” on page 2–25 .
f
f
For Stratix II-related documentation including Stratix II pinout data refer
to the Altera Stratix II literature page at www.altera.com/ literature/lit-
stx2.html .
Early shipments of the board had a heat sink mounted on the Stratix II
FPGA. Boards shipped later than May 2005 do not include the heat sink,
because thermal management is unnecessary for the majority of FPGA
designs for this board. A heat sink maintains the FPGA within its
specified thermal operating range, independent of the resource
utilization, clock frequency, and operating conditions of the FPGA. The
heat sink used on early shipments of the board is produced by Intricast
Inc., part number CS1995V01. See www.intricast.com for details.
Refer to Altera's AN185: Thermal Management Using Heat Sinks for
information on using heat sinks with Altera devices.
2–8
Nios Development Board Reference Manual, Stratix II Edition
Altera Corporation
July 2005
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