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| 型号： | DK-NIOS-2S60N |
| 厂商： | Altera |
| 文件页数： | 34/56页 |
| 文件大小： | 0K |
| 描述： | NIOS II KIT W/STRATIX II EP2S60N |
| 标准包装： | 1 |
| 系列： | Stratix® II |
| 类型： | Nios?II |
| 适用于相关产品： | Stratix ll 2S60N |
| 所含物品： | 评估板，设计应用程序，软件，线缆和配件 |
| 相关产品： | 544-1906-ND - IC STRATIX II FPGA 60K 484-FBGA 544-1907-ND - IC STRATIX II FPGA 60K 484-FBGA 544-1908-ND - IC STRATIX II FPGA 60K 484-FBGA 544-1910-ND - IC STRATIX II FPGA 60K 484-FBGA 544-1912-ND - IC STRATIX II FPGA 60K 672-FBGA 544-1913-ND - IC STRATIX II FPGA 60K 672-FBGA 544-1914-ND - IC STRATIX II FPGA 60K 672-FBGA 544-1916-ND - IC STRATIX II FPGA 60K 672-FBGA 544-1915-ND - IC STRATIX II FPGA 60K 672-FBGA 544-1909-ND - IC STRATIX II FPGA 60K 484-FBGA 更多... |
| 其它名称： | 544-1697 |
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Factory & User Configurations
f
Factory & User
Configurations
For details on programming configuration data to flash memory, see the
Nios II Flash Programmer User Guide , or refer to the Nios II IDE online
help.
The configuration controller can manage two separate Stratix II device
configurations stored in flash memory. These two configurations are
referred to as the factory configuration and the user configuration. A Nios
II reference design is factory-programmed into the factory configuration
region of the flash memory.
The Configuration Process
Upon reset or when the Reset, Config button (SW10) is pressed, the
configuration controller will attempt to download the user configuration
data to the FPGA. If this process fails (because the user configuration is
either invalid or not present), the configuration controller will then
download the factory configuration to the FPGA.
When SW9 (Factory Config) is pressed, the configuration controller will
ignore the user configuration and always configure the FPGA with the
factory configuration. This switch allows you to "escape" from the
situation where a valid-but-nonfunctional user configuration is present in
flash memory.
The configuration controller reads data from flash memory, passes it to
the FPGA, and applies appropriate control signals to configure the FPGA.
When FPGA configuration completes successfully, the configuration
controller electrically disconnects itself from the flash memory lines, and
enters an idle state.
2–26
Nios Development Board Reference Manual, Stratix II Edition
Altera Corporation
July 2005
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