参数资料
型号: DO-CPLD-DK-J-G
厂商: Xilinx Inc
文件页数: 15/24页
文件大小: 0K
描述: KIT STARTER CPLD JAPANESE
标准包装: 1
系列: CoolRunner™- II
类型: CPLD 开发套件
适用于相关产品: CoolRunner-ll,XC9500XL
所含物品: 原型板,下载缆线,软件和文档
R
Thresholds
From the curve (see Figure 3 ), you can see that when you drive 24 mA, the nominal output
is 2.8V, which is above the Vohmin requirement for both the LVCMOS33 and LVTTL
standards.
The user must ensure that the Vohmin requirement meets the Vihmin of the downstream
device.
UG445_09_101007
Figure 3:
I/V Curve Example 3
Maximum I/O Power Dissipation
As an example, you might want to know how to calculate the maximum number of I/Os
one device can sink or source before damaging the device.
In this example, you calculate how many I/Os one device can sink or source current before
you violate the acceptable Ta range. If you want to keep the device within the
recommended limits to prevent long-term reliability implications, adjust the TjMax so that
it is equal to the maximum Ta for the temperature grade you are using (i.e., Commercial =
70°C, Industrial = 85°C). This ensures that the 20-year data retention limit is preserved, as
well as guarantee the specified timing delays in the data sheet.
If you sink or source lots of current with one device, you risk heating it so much that it is
destroyed. So, you need to know the maximum permissible temperature of the package. If
you want to perform the calculations to see how much current will be sourced or sunk
before the device is compromised, adjust the Tjmax in the calculation to the Tjmax of the
package (i.e., Tjmax = 125°C for a plastic package).
CPLD I/O User Guide
UG445 (v1.2) January 14, 2014
15
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