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参数资料
| 型号： | DP5Z2MW16PH3-15C |
| 元件分类： | PROM |
| 英文描述： | 2M X 16 FLASH 5V PROM MODULE, 120 ns, QFP48 |
| 封装： | HERMETIC SEALED, CERAMIC, GULLWING, MODULE, SLCC-48 |
| 文件页数： | 5/21页 |
| 文件大小： | 4549K |
| 代理商： | DP5Z2MW16PH3-15C |
Dense-Pac Microsystems, Inc.
DP5Z2MW16Pn3
PRELIMINARY
OUTPUT LOAD
Load
CL
Parameters Measured
1
100 pF
except tDF, tLZ and tOLZ
2
30pF
tDF, tLZ and tOLZ
AC TEST CONDITIONS
Input Pulse Levels
0.45V to 2.4V
Input Pulse Rise and Fall Times
10ns
Input and Output
Timing Reference Levels
0.8V, 2.0V
AC Operating Conditions and Characteristics - Read Cycle: Over operating ranges
No. Symbol
Parameter
120ns
150ns
200ns
Unit
Min.
Max.
Min.
Max.
Min.
Max.
1
tACC
Address to Output Delay
120
150
ns
2
tCE
Chip Enable Output Delay
120
150
ns
3
tOE
Output Enable Output Delay
60
70
80
ns
4
tDF
Output Enable to Output Delay
0
55
0
55
0
70
ns
5
tOH
Address to Output Hold
0
ns
AC INPUT OUTPUT REFERENCE WAVEFORM
AC test inputs are driven at VOH (2.4 VTTL) for Logic “1’’ and VOL (0.45 VTTL) for a Logic ‘’0’’. Input timing begins at VIH (2.0 VTTL)
and VIL (0.8 VTTL). Output timing ends at VIH and VIL. Input rise and fall times (10% to ()%) < 10ns.
OUTPUT LOAD
+5V
1.8K
DIODES = IN3064 or Equivalent
CL*
6.2K
* Including Probe and Jig Capacitance.
DEVICE
UNDER
TEST
30A161-22
REV. B
13
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