参数资料
型号: DS1875T+
厂商: Maxim Integrated Products
文件页数: 11/92页
文件大小: 0K
描述: IC SFP CTRLR/TRIPLEXER 38-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 90
应用: 光纤
接口: I²C
电源电压: 2.85 V ~ 3.9 V
封装/外壳: 38-WFQFN 裸露焊盘
供应商设备封装: 38-TQFN(5x7)
包装: 管件
安装类型: 表面贴装
产品目录页面: 1431 (CN2011-ZH PDF)
DS1875
quick-trip alarm that is detected by default remains
active until a subsequent comparator sample shows the
condition no longer exists. A second bias-current moni-
tor (BIAS MAX) compares the DS1875’s BIAS DAC’s
code to a digital value stored in the MAX BIAS register.
This comparison is made at every bias-current update
to ensure that a high bias current is quickly detected.
Monitors and Fault Detection
Monitors
Monitoring functions on the DS1875 include a power-on
analog (POA) VCC comparison, five quick-trip com-
parators, and ADC channels. This monitoring combined
with the interrupt masks determine if the DS1875 shuts
down its outputs and triggers the TX-F and FETG out-
puts. All the monitoring levels and interrupt masks are
user programmable with the exception of POA, which
trips at a fixed range and is nonmaskable for safety
reasons.
Power-On Analog (POA)
POA holds the DS1875 in reset until VCC is at a suitable
level (VCC > VPOA) for the part to accurately measure
with its ADC and compare analog signals with its quick-
trip monitors. Because VCC cannot be measured by the
ADC when VCC is less than VPOA, POA also asserts the
VCC low alarm, which is cleared by a VCC ADC conver-
sion greater than the customer-programmable VCC low
ADC limit. This allows a programmable limit to ensure
that the head room requirements of the transceiver are
satisfied during slow power-up. The TX-F and FETG
outputs do not latch until there is a conversion above
the VCC low limit. The POA alarm is nonmaskable. The
TX-F and FETG outputs are asserted when VCC is
below VPOA. See the Low-Voltage Operation section for
more information.
Five Quick-Trip Monitors and Alarms
Five quick-trip monitors are provided to detect potential
laser safety issues. These monitor:
1) High Bias Current (HBIAS)
2) Low Transmit Power (LTXP)
3) High Transmit Power (HTXP)
4) Max Output Current (BIAS MAX)
5) MON3 Quick Trip (M3QT)
The high- and low-transmit power quick-trip registers
(HTXP and LTXP) set the thresholds used to compare
against the BMD voltage to determine if the transmit
power is within specification. The HBIAS quick trip com-
pares the MON1 input (generally from the MAX3643
bias monitor output) against its threshold setting to
determine if the present bias current is above specifica-
tion. The BIAS MAX quick trip is a digital comparison
that determines if the BIAS DAC indicates that the bias
current is above specification. IBIAS is not allowed to
exceed the value set in the MAX BIAS register. When
the DS1875 detects that the bias is at the limit, it sets
the BIAS MAX status bit and clamps the bias current at
the MAX BIAS level. In the closed-loop mode, if the
recalled value from the BIAS LUT is greater than MAX
BIAS then, the update is not done and IBIAS reverts to
the previous IBIAS value. The quick trips are routed to
the TX-F and FETG outputs through interrupt masks to
allow combinations of these alarms to be used to trigger
these outputs. When FETG is triggered, the DS1875 also
disables the MOD and BIAS outputs. See the
BIAS and
MOD Output During Power-Up section for details.
MON3 Quick Trip
One additional quick trip is used to protect the APD
from overcurrent. MON3P is used to monitor the current
through the APD. When MON3P exceeds a threshold
set by the M3QT DAC register (Table 02h, Register
C3h), the PWM is shut down by blocking SW pulses.
The MON3 comparison is single-ended referenced to
ground. In the case where MON3 is used differentially
and not referenced to ground, this must be considered
when setting the MON3 quick-trip threshold.
Additionally, the D2 pin can be driven either high or low
as determined by INV M3QT and MUX M3QT bits in
Lower Memory, Register 79h. An external switch con-
trolled by pin D2 may be used to clamp the converter’s
output when MON3 quick trip occurs. This external
switch discharges the output voltage much faster than
allowing the load to discharge the rail. The MON3
quick-trip alarm can be latched by enabling M3QT LEN
in Table 02h, Register 89h. The latch is reset by setting
M3QT RESET in Lower Memory, Register 78h. A soft
quick trip is performed by setting SOFT M3QT in Lower
Memory, Register 78h (see Figure 4).
ADC Monitors and Alarms
The ADC monitors six channels that measure tempera-
ture (internal temp sensor), VCC, and MON1–MON4
using an analog multiplexer to measure them round
robin with a single ADC. Each channel has a customer-
programmable full-scale range and offset value that is
factory programmed to default value (see Table 3).
Additionally, MON1–MON4 can right-shift results by up
to 7 bits before the results are compared to alarm
thresholds or read over the I2C bus. This allows cus-
tomers with specified ADC ranges to calibrate the ADC
full scale to a factor of 1/2n their specified range to
measure small signals. The DS1875 can then right-shift
the results by n bits to maintain the bit weight of their
specification.
PON Triplexer and SFP Controller
______________________________________________________________________________________
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