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| 型号： | DS2151QB |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 37/60页 |
| 文件大小： | 0K |
| 描述： | IC TXRX T1 1-CHIP 5V LP 44-PLCC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 26 |
| 功能： | 单芯片收发器 |
| 接口： | T1 |
| 电路数： | 1 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 电流 - 电源： | 65mA |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LCC（J 形引线） |
| 供应商设备封装： | 44-PLCC（16.59x16.59） |
| 包装： | 管件 |
| 包括： | 警报检测器和发生器，CSU 回路代码发生器和检测器，DSX-1和CSU 线路补偿发生器 |
| 产品目录页面： | 1429 (CN2011-ZH PDF) |
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DS2151Q
42 of 60
13.3 Jitter Attenuator
The DS2151Q contains an on-board jitter attenuator that can be set to a depth of either 32 or 128 bits via
the JABDS bit in the Line Interface Control Register (LICR). The 128-bit mode is used in applications
where large excursions of wander are expected. The 32-bit mode is used in delay sensitive applications.
The characteristics of the attenuation are shown in Figure 13-4. The jitter attenuator can be placed in
either the receive path or the transmit path by appropriately setting or clearing the JAS bit in the LICR.
Also, the jitter attenuator can be disabled (in effect, removed) by setting the DJA-bit in the LICR. In order
for the jitter attenuator to operate properly, a crystal with the specifications listed in Table 13-4 below
must be connected to the XTAL1 and XTAL2 pins. The jitter attenuator divides the clock provided by the
6.176MHz crystal at the XTAL1 and XTAL2 pins to create an output clock that contains very little jitter.
On-board circuitry will pull the crystal (by switching in or out load capacitance) to keep it long-term
averaged to the same frequency as the incoming T1 signal. If the incoming jitter exceeds either 120UIP-P
(buffer depth is 128 bits) or 28UIP-P (buffer depth is 32 bits), then the DS2151Q will divide the attached
crystal by either 3.5 or 4.5 instead of the normal 4 to keep the buffer from overflowing. When the device
divides by either 3.5 or 4.5, it also sets the Jitter Attenuator Limit Trip (JALT) bit in the Receive
Information Register 2 (RIR2.2).
Table 13-4. Crystal Selection Guidelines
PARAMETER
SPECIFICATION
Parallel Resonant Frequency
6.176MHz
Mode
Fundamental
Load Capacitance
18pF to 20pF (18.5pF nominal)
Tolerance
±50ppm
Pullability
CL = 10pF, delta frequency = +175ppm to
+250ppm
CL = 45pF, delta frequency = -175ppm to -250ppm
Effective Series Resistance
40
maximum
Crystal Cut
AT
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2151QB/T&R | 制造商:Maxim Integrated Products 功能描述:T1 SINGLE CHIP XCVR REV B T&R - Tape and Reel |
| DS2151QB/T&R+ | 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel |
| DS2151QB/T&R | 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS2151QB+ | 功能描述:网络控制器与处理器 IC T1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS2151QB+T&R | 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel |
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