参数资料
型号: DS21552LN+
厂商: Maxim Integrated Products
文件页数: 111/137页
文件大小: 0K
描述: IC TXRX T1 1-CHIP 5V 100-LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 90
功能: 单芯片收发器
接口: E1,HDLC,J1,T1
电路数: 1
电源电压: 4.75 V ~ 5.25 V
电流 - 电源: 75mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-LQFP(14x14)
包装: 托盘
包括: DSX-1 和 CSU 线路补偿发生器,HDLC 控制器,带内回路代码发生器和检测器
DS21352/DS21552
75 of 137
RHFR: RECEIVE HDLC FIFO (Address=05 Hex)
(MSB)
(LSB)
RHFR7
RHFR6
RHFR5
RHFR4
RHFR3
RHFR2
RHFR1
RHFR0
SYMBOL
POSITION
NAME AND DESCRIPTION
RHFR7
RHFR.7
HDLC Data Bit 7. MSB of a HDLC packet data byte.
RHFR6
RHFR.6
HDLC Data Bit 6.
RHFR5
RHFR.5
HDLC Data Bit 5.
RHFR4
RHFR.4
HDLC Data Bit 4.
RHFR3
RHFR.3
HDLC Data Bit 3.
RHFR2
RHFR.2
HDLC Data Bit 2.
RHFR1
RHFR.1
HDLC Data Bit 1.
RHFR0
RHFR.0
HDLC Data Bit 0. LSB of a HDLC packet data byte.
THIR: TRANSMIT HDLC INFORMATION (Address=06 Hex)
(MSB)
(LSB)
–––––
TEMPTY
TFULL
TUDR
SYMBOL
POSITION
NAME AND DESCRIPTION
–THIR.7
Not Assigned. Could be any value when read.
–THIR.6
Not Assigned. Could be any value when read.
–THIR.5
Not Assigned. Could be any value when read.
–THIR.4
Not Assigned. Could be any value when read.
–THIR.3
Not Assigned. Could be any value when read.
TEMPTY
THIR.2
Transmit FIFO Empty. A real–time bit that is set high when the FIFO is empty.
TFULL
THIR.1
Transmit FIFO Full. A real–time bit that is set high when the FIFO is full.
TUDR
THIR.0
Transmit FIFO Under-run. Set when the transmit FIFO empties out without the
TEOM control bit being set. An abort is automatically sent.
NOTE:
The TUDR bit is latched and will be cleared when read.
TBOC: TRANSMIT BOC REGISTER (Address=07 Hex)
(MSB)
(LSB)
SBOC
HBEN
BOC5
BOC4
BOC3
BOC2
BOC1
BOC0
SYMBOL
POSITION
NAME AND DESCRIPTION
SBOC
TBOC.7
Send BOC. Rising edge triggered. Must be transitioned from a 0 to a 1 transmit the
BOC code placed in the BOC0 to BOC5 bits instead of data from the HDLC controller.
HBEN
TBOC.6
Transmit HDLC & BOC Controller Enable.
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