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参数资料
型号： DS21Q44T+
厂商： Maxim Integrated Products
文件页数： 32/105页
文件大小： 0K
描述： IC FRAMER ENHANCED E1 4X 128TQFP
标准包装： 72
控制器类型： E1 调帧器
接口： 并行/串行
电源电压： 2.97 V ~ 3.63 V
电流 - 电源： 75mA
工作温度： 0°C ~ 70°C
安装类型： 表面贴装
封装/外壳： 128-LQFP
供应商设备封装： 128-LQFP（14x20）
包装： 管件
DS21Q44
32 of 105
AUTOMATIC ALARM GENERATION
The DS21Q44 can be programmed to automatically transmit AIS or Remote Alarm. When automatic
AIS generation is enabled (CCR2.5 = 1), the framer monitors the receive side to determine if any of the
following conditions are present: loss of receive frame synchronization, AIS alarm (all one’s) reception,
or loss of receive carrier (or signal). If any one (or more) of the above conditions is present, then the
framer will transmit an AIS alarm.
When automatic RAI generation is enabled (CCR2.4 = 1), the framer monitors the receive side to
determine if any of the following conditions are present: loss of receive frame synchronization, AIS alarm
(all one’s) reception, loss of receive carrier or if CRC4 multiframe synchronization (if enabled) cannot be
found within 128 ms of FAS synchronization. If any one (or more) of the above conditions is present,
then the framer will transmit a RAI alarm. RAI generation conforms to ETS 300 011 specifications and a
constant Remote Alarm will be transmitted if the framer cannot find CRC4 multiframe synchronization
within 400 ms as per G.706.
It is an illegal state to have both CCR2.4 and CCR2.5 set to one at the same time.
CCR3: COMMON CONTROL REGISTER 3 (Address=1B Hex)
(MSB)
(LSB)
TESE
TCBFS
TIRFS
–
RSRE
THSE
TBCS
RCLA
SYMBOL
POSITION
NAME AND DESCRIPTION
TESE
CCR3.7
Transmit Side Elastic Store Enable.
0=elastic store is bypassed
1=elastic store is enabled
TCBFS
CCR3.6
Transmit Channel Blocking Registers (TCBR) Function
Select.
0=TCBRs define the operation of the TCHBLK output pin
1=TCBRs define which signaling bits are to be inserted
TIRFS
CCR3.5
Transmit Idle Registers (TIR) Function Select. See Section
11 for details.
0=TIRs define in which channels to insert idle code
1=TIRs define in which channels to insert data from RSER
(i.e., Per Channel Loopback function)
–
CCR3.4
Not Assigned. Should be set to zero when written.
RSRE
CCR3.3
Receive Side Signaling Re–Insertion Enable. See Section 10
for details.
0=do not re–insert signaling bits into the data stream presented
at the RSER pin
1=re–insert the signaling bits into data stream presented at the
RSER pin
THSE
CCR3.2
Transmit Side Hardware Signaling Insertion Enable. See
Section 10 for details.
0=do not insert signaling from the TSIG pin into the data
stream presented at the TSER pin
1=insert signaling from the TSIG pin into the data stream
presented at the TSER pin
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DS21Q48A3N 功能描述:网络控制器与处理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
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