参数资料
型号: DS21Q44T+
厂商: Maxim Integrated Products
文件页数: 65/105页
文件大小: 0K
描述: IC FRAMER ENHANCED E1 4X 128TQFP
标准包装: 72
控制器类型: E1 调帧器
接口: 并行/串行
电源电压: 2.97 V ~ 3.63 V
电流 - 电源: 75mA
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 128-LQFP
供应商设备封装: 128-LQFP(14x20)
包装: 管件
DS21Q44
62 of 105
15.3 Basic Operation Details
As a basic guideline for interpreting and sending HDLC messages, the following sequences can be
applied:
Receive a HDLC Message
1) Enable RPS interrupts.
2) Wait for interrupt to occur.
3) Disable RPS interrupt and enable either RPE, RNE, or RHALF interrupt.
4) Read RHIR to obtain REMPTY status.
a) If REMPTY = 0, then record OBYTE, CBYTE, and POK bits and then read the FIFO
a1) If CBYTE = 0, then skip to Step 5.
a2) If CBYTE = 1, then skip to Step 7.
b) If REMPTY=1, then skip to Step 6.
5) Repeat Step 4.
6) Wait for interrupt, skip to Step 4.
7) If POK = 0, then discard whole packet; if POK = 1, accept the packet.
8) Disable RPE, RNE, or RHALF interrupt, enable RPS interrupt and return to Step 1.
Transmit a HDLC Message
1) Make sure HDLC controller is done sending any previous messages and is current sending flags by
checking that the FIFO is empty by reading the TEMPTY status bit in the THIR register.
2) Enable either the THALF or TNF interrupt.
3) Read THIR to obtain TFULL status.
a) If TFULL = 0, then write a byte into the FIFO and skip to next step (special case occurs when
the last byte is to be written, in this case set TEOM = 1 before writing the byte and then skip
to Step 6).
b) If TFULL = 1, then skip to Step 5.
4) Repeat Step 3.
5) Wait for interrupt, skip to Step 3.
6) Disable THALF or TNF interrupt and enable TMEND interrupt.
7) Wait for an interrupt, then read TUDR status bit to make sure packet was transmitted correctly.
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