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参数资料
型号： DS21Q44T+
厂商： Maxim Integrated Products
文件页数： 56/105页
文件大小： 0K
描述： IC FRAMER ENHANCED E1 4X 128TQFP
标准包装： 72
控制器类型： E1 调帧器
接口： 并行/串行
电源电压： 2.97 V ~ 3.63 V
电流 - 电源： 75mA
工作温度： 0°C ~ 70°C
安装类型： 表面贴装
封装/外壳： 128-LQFP
供应商设备封装： 128-LQFP（14x20）
包装： 管件
DS21Q44
54 of 105
TCBR1/TCBR2/TCBR3/TCBR4: TRANSMIT CHANNEL BLOCKING
REGISTERS (Address=22 to 25 Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
TCBR1 (22)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
TCBR2 (23)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
TCBR3 (24)
CH32
CH31
CH30
CH29
CH28
CH27
CH26
CH25
TCBR4 (25)
SYMBOLS
POSITIONS
NAME AND DESCRIPTION
CH1 - 32
TCBR1.0 - 4.7
Transmit Channel Blocking Control Bits.
0 = force the TCHBLK pin to remain low during this channel
time
1 = force the TCHBLK pin high during this channel time
NOTE:
If CCR3.6=1, then a zero in the TCBRs implies that signaling data is to be sourced from TSER (or TSIG
if CCR3.2=1) and a one implies that signaling data for that channel is to be sourced from the Transmit
Signaling (TS) registers. See definition below.
TCBR1/TCBR2/TCBR3/TCBR4: DEFINITION WHEN CCR3.6=1
(MSB)
(LSB)
CH20
CH4
CH19
CH3
CH18
CH2
CH17*
CH1*
TCBR1 (22)
CH24
CH8
CH23
CH7
CH22
CH6
CH21
CH5
TCBR2 (23)
CH28
CH12
CH27
CH11
CH26
CH10
CH25
CH9
TCBR3 (24)
CH32
CH16
CH31
CH15
CH30
CH14
CH29
CH13
TCBR4 (25)
*=CH1 and CH17 should be set to one to allow the internal TS1 register to create the CAS Multiframe
Alignment Word and Spare/Remote Alarm bits.
13. ELASTIC STORES OPERATION
Each framer in the DS21Q44 contains dual two–frame (512 bits) elastic stores, one for the receive
direction, and one for the transmit direction. These elastic stores have two main purposes. First, they can
be used to rate convert the E1 data stream to 1.544 Mbps (or a multiple of 1.544 Mbps) which is the T1
rate. Secondly, they can be used to absorb the differences in frequency and phase between the E1 data
stream and an asynchronous (i.e., not frequency locked) backplane clock which can be 1.544 MHz or
2.048 MHz. The backplane clock can burst at rates up to 8.192 MHz. Both elastic stores contain full
controlled slip capability which is necessary for this second purpose. Both elastic stores within a framer
are fully independent and no restrictions apply to the sourcing of the various clocks that are applied to
them. The transmit side elastic store can be enabled whether the receive elastic store is enabled or
disabled and vice versa. Also, each elastic store can interface to either a 1.544 MHz or 2.048 MHz
backplane without regard to the backplane rate the other elastic store is interfacing.
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