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| 型号： | DS26303LN-75+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 74/101页 |
| 文件大小： | 0K |
| 描述： | IC LIU E1/T1/J1 3.3V 144-ELQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 13 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 8/8 |
| 规程： | T1/E1/J1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LQFP 裸露焊盘 |
| 供应商设备封装： | 144-LQFP 裸露焊盘 |
| 包装： | 托盘 |
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DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
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7.1.10 Select-IR-Scan
All test registers retain their previous state. The instruction register will remain unchanged during this state. With
JTMS LOW, a rising edge on TCLK moves the controller into the Capture-IR state and will initiate a scan sequence
for the instruction register. JTMS HIGH during a rising edge on TCLK puts the controller back into the Test-Logic-
Reset state.
7.1.11 Capture-IR
The Capture-IR state is used to load the shift register in the instruction register with a fixed value. This value is
loaded on the rising edge of TCLK. If JTMS is HIGH on the rising edge of TCLK, the controller will enter the Exit1-
IR state. If JTMS is LOW on the rising edge of TCLK, the controller will enter the Shift-IR state.
7.1.12 Shift-IR
In this state, the shift register in the instruction register is connected between JTDI and JTDO and shifts data one
stage for every rising edge of TCLK towards the serial output. The parallel registers as well as all test registers
remain at their previous states. A rising edge on TCLK with JTMS HIGH will move the controller to the Exit1-IR
state. A rising edge on TCLK with JTMS LOW will keep the controller in the Shift-IR state while moving data one
stage through the instruction shift register.
7.1.13 Exit1-IR
A rising edge on TCLK with JTMS LOW will put the controller in the Pause-IR state. If JTMS is HIGH on the rising
edge of TCLK, the controller will enter the Update-IR state and terminate the scanning process.
7.1.14 Pause-IR
Shifting of the instruction shift register is halted temporarily. With JTMS HIGH, a rising edge on TCLK will put the
controller in the Exit2-IR state. The controller will remain in the Pause-IR state if JTMS is LOW during a rising edge
on TCLK.
7.1.15 Exit2-IR
A rising edge on TCLK with JTMS HIGH will put the controller in the Update-IR state. The controller will loop back
to Shift-IR if JTMS is LOW during a rising edge of TCLK in this state.
7.1.16 Update-IR
The instruction code shifted into the instruction shift register is latched into the parallel output on the falling edge of
TCLK as the controller enters this state. Once latched, this instruction becomes the current instruction. A rising
edge on TCLK with JTMS LOW will put the controller in the Run-Test-Idle state. With JTMS HIGH, the controller
will enter the Select-DR-Scan state.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS26303LN-75+ | 功能描述:电信线路管理 IC 3.3V E1/T1/J1 Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray |
| DS26303LN-75+A3 | 功能描述:电信线路管理 IC 3.3V E1/T1/J1 Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray |
| DS26303LN-75A3 | 功能描述:电信线路管理 IC 3.3V E1/T1/J1 Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray |
| DS26303LN-XXX | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26303LN-XXX+ | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
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