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参数资料
| 型号： | DS3112 |
| 厂商： | DALLAS SEMICONDUCTOR |
| 元件分类： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PBGA256 |
| 封装： | 27 X 27 MM, PLASTIC, BGA-256 |
| 文件页数： | 85/134页 |
| 文件大小： | 900K |
| 代理商： | DS3112 |
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DS3112
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Bit 3 / Remote Alarm Indication Detected (RAI). This latched read only alarm status bit will be set to
a one when the T3 or E3 framer detects an incoming Remote Alarm Indication (RAI) signal. This bit will
be cleared when read unless an RAI signal is still present. A change in state of the RAI detection can
cause a hardware interrupt to occur if the RAI bit in the Interrupt Mask for T3E3SR (IT3E3SR) register is
set to a one and the T3E3SR bit in the Interrupt Mask for MSR (IMSR) register is set to a one. The
interrupt will be allowed to clear when this bit is read. The RAI alarm detection criteria is described in
Tables 5.3A and 5.3B. RAI can also be indicated via the FEAC codes when the device is operated in the
C-Bit Parity Mode.
Bit 4 / T3 Idle Signal Detected (T3IDLE). This latched read only alarm status bit will be set to a one
when the T3 framer detects an incoming idle signal. This bit will be cleared when read unless the idle
signal is still present. A change in state of idle detection can cause a hardware interrupt to occur if the
IDLE bit in the Interrupt Mask for T3E3SR (IT3E3SR) register is set to a one and the T3E3SR bit in the
Interrupt Mask for MSR (IMSR) register is set to a one. The IDLE detection criteria is described in Table
5.3A. The interrupt will be allowed to clear when this bit is read. When the DS3112 is operated in the
E3 mode, this status bit should be ignored.
Bit 5 / Transmit T3/E3 Start Of Frame (TSOF). This latched read only event status bit will be set to a
one on each T3/E3 transmit frame boundary. This bit is a software version of the FTSOF hardware signal
and it will be cleared when read. The setting of this bit can cause a hardware interrupt to occur if the
TSOF bit in the Interrupt Mask for T3E3SR (IT3E3SR) register is set to a one and the T3E3SR bit in the
Interrupt Mask for MSR (IMSR) register is set to a one.
Bit 6 / Receive T3/E3 Start Of Frame (RSOF). This latched read only event status bit will be set to a
one on each T3/E3 receive frame boundary. This bit is a software version of the FRSOF hardware signal
and it will be cleared when read. The setting of this bit can cause a hardware interrupt to occur if the
RSOF bit in the Interrupt Mask for T3E3SR (IT3E3SR) register is set to a one and the T3E3SR bit in the
Interrupt Mask for MSR (IMSR) register is set to a one.
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PDF描述 |
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| DS3150QN | DATACOM, PCM TRANSCEIVER, PQCC28 |
| DS3150Q | DATACOM, PCM TRANSCEIVER, PQCC28 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS3112+ | 功能描述:网络控制器与处理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS3112+W | 功能描述:网络控制器与处理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS3112D1 | 功能描述:网络控制器与处理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS3112D1+ | 功能描述:网络控制器与处理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS3112DK | 功能描述:网络开发工具 DS3112 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 产品:Development Kits 类型:Ethernet to Wi-Fi Bridges 工具用于评估:RCM6600W 数据速率:20 Mbps, 40 Mbps 接口类型:802.11 b/g, Ethernet 工作电源电压:3.3 V |
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