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参数资料
| 型号： | DS3882E+T&R/C |
| 厂商： | Maxim Integrated |
| 文件页数： | 15/31页 |
| 文件大小： | 0K |
| 描述： | IC AUTO CCFL CTRLR 2CH 28-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1,000 |
| 类型： | CCFL 控制器 |
| 频率： | 40 ~ 100 kHz |
| 电流 - 电源： | 12mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 带卷 (TR) |
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Dual-Channel Automotive CCFL Controller
Setting the Lamp and Dimming
Clock (DPWM) Frequencies
Using External Resistors
Both the lamp and dimming clock frequencies can be
set using external resistors. The resistance required for
either frequency can be determined using the following
formula:
reaching the strike voltage and could potentially cause
numerous other problems. Operating with the trans-
former voltage at too high of a level can be damaging
to the inverter components. Proper use of the SVMs
can prevent these problems. If desired, the high and/or
low SVMs can be disabled by connecting the SVMH
pin to GND and the SVML pin to V CC .
V TRIP = 2 . 0 ? 1 2 ?
R OSC =
K
f OSC
? R + R ?
? R 1 ?
R LOSC =
= 32 . 0 k Ω
R POSC =
= 25 . 0 k Ω
where K = 1600kΩ ? kHz for lamp frequency calculations.
When calculating the resistor value for the dimming clock
frequency, K will be one of four values as determined by
the desired frequency and the POSCR0 and POSCR1 bit
settings as shown in the Control Register 2 (CR2) Table 7
in the Detailed Register Descriptions section.
Example: Selecting the resistor values to configure a
DS3882 to have a 50kHz lamp frequency and a 160Hz
dimming clock frequency: For this configuration,
POSCR0 and POSCR1 must be programmed to 1 and
0, respectively, to select 90Hz to 220Hz as the dimming
clock frequency range. This sets K for the dimming
clock resistor (R POSC ) calculation to 4k Ω ? kHz. For the
lamp frequency resistor (R LOSC ) calculation, K =
1600k Ω ? kHz, which sets the lamp frequency K value
regardless of the frequency. The formula above can
now be used to calculate the resistor values for R LOSC
and R POSC as follows:
1600 k Ω ? kHz
50 kHz
4 k Ω ? kHz
0 . 160 kHz
Supply Monitoring
The DS3882 has supply voltage monitors (SVMs) for
both the inverter’s transformer DC supply (V INV ) and its
The V CC monitor is used as a 5V supply undervoltage
lockout (UVLO) that prevents operation when the
DS3882 does not have adequate voltage for its analog
circuitry to operate or to drive the external MOSFETs.
The V CC monitor features hysteresis to prevent V CC
noise from causing spurious operation when V CC is
near the trip point. This monitor cannot be disabled by
any means.
Fault Monitoring
The DS3882 provides extensive fault monitoring for
each channel. It can detect open-lamp, lamp overcur-
rent, failure to strike, and overvoltage conditions. The
DS3882 can be configured to disable all channels if
one or more channels enter a fault state or it can be
configured to disable only the channel where the fault
occurred. Once a fault state has been entered, the
FAULT output is asserted and the channel(s) remains
disabled until it is reset by a user or host control event.
See Step 4, Fault Handling for more detail. The DS3882
can also be configured to automatically attempt to clear
a detected fault (except lamp overcurrent) by re-striking
the lamp. Configuration bits for the fault monitoring
options are located in CR1 and CR2. The DS3882 also
has real-time status indicators bits located in the SR1
and SR2 register (SRAM) that assert whenever a corre-
sponding fault occurs.
own V CC supply to ensure that both voltage levels are
adequate for proper operation. The transformer supply
is monitored for overvoltage conditions at the SVMH pin
and undervoltage conditions at the SVML pin. External
R 2
V INV
V INV
R 2
resistor-dividers at each SVM input feed into two com-
parators (see Figure 7), both having 2V thresholds.
Using the equation below to determine the resistor val-
ues, the SVMH and SVML trip points (V TRIP ) can be
V TRIP
R 1
SVML
2.0V
DS3882
SVMH
2.0V
V TRIP
R 1
customized to shut off the inverter when the trans-
former’s supply voltage rises above or drops below
specified values. Operating with the transformer’s sup-
ply at too low of a level can prevent the inverter from
Figure 7. Setting the SVM Threshold Voltage
____________________________________________________________________
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