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参数资料
| 型号： | DS3882E+T&R/C |
| 厂商： | Maxim Integrated |
| 文件页数： | 20/31页 |
| 文件大小： | 0K |
| 描述： | IC AUTO CCFL CTRLR 2CH 28-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1,000 |
| 类型： | CCFL 控制器 |
| 频率： | 40 ~ 100 kHz |
| 电流 - 电源： | 12mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 带卷 (TR) |
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Dual-Channel Automotive CCFL Controller
Table 3. Status Register 2 (SR2) [SRAM, E1h]
BIT
R/W
POWER-UP
DEFAULT
NAME
FUNCTION
Fault Condition—Real Time. A real-time bit that indicates the current operating status
0
R
0
FAULT_RT
of channel 2.
0 = Normal condition
1 = Fault condition
1
2
3
4
5
6
7
R
R
R
R
R
R
R
0
0
0
0
0
0
0
FAULT_L
STO_L
OV_L
LOUT_L
LOC_L
RSVD
RSVD
Fault Condition—Latched. A latched bit that is set when the channel enters a fault
condition. This bit is cleared when read regardless of the current state of fault.
Lamp Strike Time Out—Latched. A latched bit that is set when the lamp fails to strike.
This bit is cleared when read.
Overvoltage—Latched. A latched bit that is set when a lamp overvoltage is present
for at least 64 lamp cycles. This bit is cleared when read.
Lamp Out—Latched. A latched bit that is set when a lamp out is detected. This bit is
cleared when read.
Lamp Overcurrent—Latched. A latched bit that is set when a lamp overcurrent is
detected. This bit is cleared when read.
Reserved. Could be either 0 or 1 when read.
Reserved. Could be either 0 or 1 when read.
Note 1: Writing to this register has no effect on it.
Note 2: See Figure 8 for more details on how the status bits are set.
Note 3: SR2 is cleared when any of the following occurs:
? V CC drops below the UVLO threshold
? the SVML or SVMH thresholds are crossed
? the PDN hardware pin goes high
? the PDNE software bit is written to a logic 1
? the channel is disabled by the CH2D control bit
Table 4. Brightness Lamp Current Register (BLC) [SRAM, E3h]
BIT
0
1
2
3
4
R/W
R/W
R/W
R/W
R/W
R/W
FACTORY
DEFAULT
0
0
0
0
0
NAME
LC0
LC1
LC2
LC3
LC4
FUNCTION
These five control bits determine the target value for the lamp current. 11111b is
35% of the nominal level and 00000b is 100% of the nominal level. These control
bits are used for fine adjustment of the lamp brightness.
Channel 1 Disable
5
R/W
0
CH1D
0 = Channel 1 enabled
1 = Channel 1 disabled
Channel 2 Disable. Useful for dimming in two lamp applications.
6
R/W
0
CH2D
0 = Channel 2 enabled
1 = Channel 2 disabled
SRAM-Shadowed EEPROM Write Control
7
R/W
0
SEEB
0 = Enables writes to EEPROM
1 = Disables writes to EEPROM
20
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