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参数资料
| 型号： | DS3882E+T&R/C |
| 厂商： | Maxim Integrated |
| 文件页数： | 18/31页 |
| 文件大小： | 0K |
| 描述： | IC AUTO CCFL CTRLR 2CH 28-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1,000 |
| 类型： | CCFL 控制器 |
| 频率： | 40 ~ 100 kHz |
| 电流 - 电源： | 12mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 带卷 (TR) |
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Dual-Channel Automotive CCFL Controller
EMI Suppression Functionality
The DS3882 contains two electromagnetic interference
suppression features: spread-spectrum modulation and
lamp oscillator frequency stepping. The first is the abili-
ty to spread the spectrum of the lamp frequency. By
setting either SS0 and/or SS1 in EMIC register, the con-
troller can be configured to dither the lamp frequency
by ±1.5%, ±3%, or ±6%. By setting a non-zero value in
SS0/1, spread-spectrum modulation is enabled and
oscillator frequency stepping is disabled. In spread-
spectrum modulation mode the dither modulation rate
is also selectable by setting FS0/1/2, and has either a
triangular (SSM = 0) or a pseudorandom profile (SSM =
1). Users have the flexibility to choosing the best modu-
lation rate (through FS0/1/2) for the application.
The second EMI suppression scheme is the ability to
move the lamp frequency up or down by 1%, 2%, 3%,
or 4%. In this scheme, the actual radiated EMI is not
reduced but it is moved out of a sensitive frequency
region. STEPE bit and/or STEP pin is used to enable
lamp frequency stepping (SS0/1 must be 0). Once
enabled, the FS0/1/2 value controls the lamp oscillator
frequency shift. For example, if the lamp frequency cre-
ates EMI disturbing an audio radio station, it can be
moved up or down slightly to slide the spurious interfer-
er out of band.
Table 1. Register Map
Lamp Current Overdrive Functionality
Another feature the DS3882 offers is the ability to over-
drive the lamps to allow them to heat up quickly in cold
environments. After setting the LCO0/1/2 bits in the
LCOC register and enabling the LCOE bit or LCO pin,
the DS3882 overdrives the nominal current settings in
12.5% steps from 112.5% up to 200%. The DS3882
accomplishes this by automatically shifting the lamp
regulation threshold, V LRT , upward to allow more cur-
rent to flow in the lamps (Figure 2). This multilevel
adjustment makes it possible to slowly decrease the
current overdrive (through I 2 C) after the lamps have
warmed up, so the end user does not see any change
in brightness when the overdrive is no longer needed.
The DS3882 also features an optional timer capable of
automatically turning off the current overdrive. This
timer is adjustable from approximately 1.5 minutes to
21 minutes (if a 50kHz lamp frequency is used).
Detailed Register Descriptions
The DS3882 ’s register map is shown in Table 1.
Detailed register and bit descriptions follow in the sub-
sequent tables.
BYTE
ADDRESS
BYTE
NAME
FACTORY
DEFAULT
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
E0h
SR1
00h
SVMH_RT SVML_RT
LOC_L1
LOUT_L1
OV_L1
STO_L1
FAULT_L1
FAULT_RT1
E1h
E2h
E3h
SR2
BPWM
BLC
00h
00h
1Fh
RSVD
RSVD
SEEB
RSVD
PWM6
CH2D
LOC_L1
PWM5
CH1D
LOUT_L2
PWM4
LC4
OV_L2
PWM3
LC3
STO_L2
PWM2
LC2
FAULT_L2
PWM1
LC1
FAULT_RT2
PWM0
LC0
F0h
SSP1
21h
LST1
MDC code for soft-start lamp
cycles 3, 4
LST0
MDC code for soft-start lamp cycles 1, 2
F1h
F2h
F3h
SSP2
SSP3
SSP4
43h
65h
77h
MDC code for soft-start lamp cycles 7, 8
MDC code for soft-start lamp cycles 11, 12
MDC code for soft-start lamp cycles 15, 16
MDC code for soft-start lamp cycles 5, 6
MDC code for soft-start lamp cycles 9, 10
MDC code for soft-start lamp cycles 13, 14
F4h
F5h
F6h
F7h
F8h–FFh
CR1
CR2
EMIC
LCOC
USER
00h
08h
00h
00h
00h
DPD
PDNE
FS2
TO3
EE
FRS
RSVD
FS1
TO2
EE
ARD
RSVD
FS0
TO1
EE
RGSO
LSR1
STEPE
TO0
EE
DPSS
LSR0
RSVD
LCOE
EE
LFSS
POSCR1
SSM
LCO2
EE
POSCS
POSCR0
SS1
LCO1
EE
LOCE
UMWP
SS0
LCO0
EE
Note 1: E0h–E3h are SRAM locations, and F0h–FFh are SRAM-shadowed EEPROM.
Note 2: Altering DS3882 configuration during active CCFL operation can cause serious adverse effects.
Note 3: The BPWM, BLC, and LCOC registers control both channels of the DS3882.
18
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