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参数资料
| 型号： | DS3882E+T&R/C |
| 厂商： | Maxim Integrated |
| 文件页数： | 27/31页 |
| 文件大小： | 0K |
| 描述： | IC AUTO CCFL CTRLR 2CH 28-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1,000 |
| 类型： | CCFL 控制器 |
| 频率： | 40 ~ 100 kHz |
| 电流 - 电源： | 12mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 带卷 (TR) |
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Dual-Channel Automotive CCFL Controller
Byte Read: A byte read is an 8-bit information transfer
from the slave to the master plus a 1-bit ACK or NACK
from the master to the slave. The 8 bits of information
that are transferred (most significant bit first) from the
slave to the master are read by the master using the bit
read definition above, and the master transmits an ACK
using the bit write definition to receive additional data
bytes. The master must NACK the last byte read to ter-
minate communication so the slave will return control of
SDA to the master.
Slave Address Byte: Each slave on the I 2 C bus
responds to a slave addressing byte sent immediately
following a start condition. The slave address byte
(Figure 10) contains the slave address in the most sig-
nificant seven bits and the R/ W bit in the least signifi-
cant bit. The DS3882’s slave address is 10100A 1 A 0 0
(binary), where A 0 and A 1 are the values of the address
pins (A0 and A1). The address pin allows the device to
respond to one of four possible slave addresses. By
writing the correct slave address with R/ W = 0, the
master indicates it will write data to the slave. If R/ W =
1, the master will read data from the slave. If an incor-
rect slave address is written, the DS3882 will assume
the master is communicating with another I 2 C device
and ignore the communications until the next start con-
dition is sent.
Memory Address: During an I 2 C write operation, the
master must transmit a memory address to identify the
memory location where the slave is to store the data.
The memory address is always the second byte trans-
mitted during a write operation following the slave
address byte.
Acknowledge Polling: Any time EEPROM is written,
the DS3882 requires the EEPROM write time (t W ) after
the stop condition to write the contents to EEPROM.
During the EEPROM write time, the DS3882 will not
acknowledge its slave address because it is busy. It is
possible to take advantage of that phenomenon by
repeatedly addressing the DS3882, which allows the
next byte of data to be written as soon as the DS3882 is
ready to receive the data. The alternative to acknowl-
edge polling is to wait for a maximum period of t W to
elapse before attempting to write again to the DS3882.
EEPROM Write Cycles: The number of times the
DS3882 ’s EEPROM can be written before it fails is
specified in the Nonvolatile Memory Characteristics
table. This specification is shown at the worst-case
write temperature. The DS3882 is typically capable of
handling many additional write cycles when the writes
are performed at room temperature.
Reading a Data Byte from a Slave: To read a single
byte from the slave the master generates a start condi-
tion, writes the slave address byte with R/ W = 0, writes
the memory address, generates a repeated start condi-
tion, writes the slave address with R/ W = 1, reads the
data byte with a NACK to indicate the end of the trans-
fer, and generates a stop condition. See Figure 11 for
more detail.
7-BIT SLAVE ADDRESS
I 2 C Communication
1
0
1
0
0 A 1 A 0
R/W
Writing a Data Byte to a Slave: The master must gen-
erate a start condition, write the slave address byte
(R/ W = 0), write the memory address, write the byte of
MOST
SIGNIFICANT BIT
A 1, A 0 PIN VALUE
DETERMINES
READ OR WRITE
data, and generate a stop condition. Remember the
master must read the slave’s acknowledgement during
all byte write operations. See Figure 11 for more detail.
Figure 10. DS3882’s Slave Address Byte
____________________________________________________________________
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