参数资料
型号: DSPIC33FJ12MC202T-I/SS
厂商: Microchip Technology
文件页数: 37/155页
文件大小: 0K
描述: IC DSPIC MCU/DSP 12K 28SSOP
产品培训模块: Asynchronous Stimulus
标准包装: 2,100
系列: dsPIC™ 33F
核心处理器: dsPIC
芯体尺寸: 16-位
速度: 40 MIP
连通性: I²C,IrDA,SPI,UART/USART
外围设备: 高级欠压探测/复位,电机控制 PWM,QEI,POR,PWM,WDT
输入/输出数: 21
程序存储器容量: 12KB(12K x 8)
程序存储器类型: 闪存
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 6x10b/12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
包装: 带卷 (TR)
dsPIC33FJ12MC201/202
DS70265E-page 22
2007-2011 Microchip Technology Inc.
3.4
CPU Control Registers
REGISTER 3-1:
SR: CPU STATUS REGISTER
R-0
R/C-0
R-0
R/C-0
R -0
R/W-0
OA
OB
SA(1)
SB(1)
OAB
SAB
DA
DC
bit 15
bit 8
R/W-0(2)
R/W-0(3)
R-0
R/W-0
IPL<2:0>(2)
RA
N
OV
Z
C
bit 7
bit 0
Legend:
C = Clear only bit
R = Readable bit
U = Unimplemented bit, read as ‘0’
S = Set only bit
W = Writable bit
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
OA:
Accumulator A Overflow Status bit
1
= Accumulator A overflowed
0
= Accumulator A has not overflowed
bit 14
OB:
Accumulator B Overflow Status bit
1
= Accumulator B overflowed
0
= Accumulator B has not overflowed
bit 13
SA:
Accumulator A Saturation ‘Sticky’ Status bit(1)
1
= Accumulator A is saturated or has been saturated at some time
0
= Accumulator A is not saturated
bit 12
SB:
Accumulator B Saturation ‘Sticky’ Status bit(1)
1
= Accumulator B is saturated or has been saturated at some time
0
= Accumulator B is not saturated
bit 11
OAB:
OA || OB Combined Accumulator Overflow Status bit
1
= Accumulators A or B have overflowed
0
= Neither Accumulators A or B have overflowed
bit 10
SAB:
SA || SB Combined Accumulator ‘Sticky’ Status bit
1
= Accumulators A or B are saturated or have been saturated at some time in the past
0
= Neither Accumulator A or B are saturated
This bit may be read or cleared (not set). Clearing this bit will clear SA and SB.
bit 9
DA: DO
Loop Active bit
1
= DO loop in progress
0
= DO loop not in progress
bit 8
DC:
MCU ALU Half Carry/Borrow bit
1
= A carry-out from the 4th low-order bit (for byte-sized data) or 8th low-order bit (for word-sized data)
of the result occurred
0
= No carry-out from the 4th low-order bit (for byte-sized data) or 8th low-order bit (for word-sized
data) of the result occurred
Note 1:
This bit can be read or cleared (not set).
2:
The IPL<2:0> bits are concatenated with the IPL<3> bit (CORCON<3>) to form the CPU Interrupt Priority
Level. The value in parentheses indicates the IPL if IPL<3> = 1. User interrupts are disabled when
IPL<3> = 1.
3:
The IPL<2:0> Status bits are read-only when NSTDIS = 1 (INTCON1<15>).
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