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| 型号： | EVAL-AD7730LEBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 37/53页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD7730 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 600 |
| 数据接口： | 串行 |
| 输入范围： | ±80 mV |
| 在以下条件下的电源（标准）： | 125mW @ 600SPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7730 |
| 已供物品： | 板，CD |
| 相关产品： | AD7730LBRUZ-ND - IC ADC TRANSDUCER BRIDGE 24TSSOP AD7730LBRZ-ND - IC ADC TRANSDUCER BRIDGE 24SOIC AD7730LBRUZ-REEL7-ND - IC ADC TRANSDUCER BRIDGE 24TSSOP AD7730LBRZ-REEL-ND - IC ADC TRANSDUCER BRIDGE 24SOIC AD7730LBRUZ-REEL-ND - IC ADC TRANSDUCER BRIDGE 24TSSOP AD7730BRUZ-REEL7-ND - IC ADC BRIDGE TRANSDUCER 24TSSOP AD7730BRUZ-REEL-ND - IC ADC BRIDGE TRANSDUCER 24TSSOP AD7730BRUZ-ND - IC ADC TRANSDUCER BRIDGE 24TSSOP AD7730BNZ-ND - IC ADC TRANSDUCER BRIDGE 24-DIP AD7730BRZ-REEL7TR-ND - IC ADC BRDGE TRANSDCR 24SOIC TR 更多... |
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AD7730/AD7730L
–42–
Figure 25. AD7730 with Bipolar Excitation of the Bridge
Bipolar Excitation of the Bridge
As mentioned previously, some applications will require that the
AD7730 handle inputs from a bridge that is excited by a bipolar
voltage. The number of applications requiring this are limited,
but with the addition of some external components the AD7730
is capable of handling such signals. Figure 25 outlines one ap-
proach to the problem.
The example shown is a dc-excited bridge that is driven from
±5 V supplies. In such a circuit, two issues must be addressed.
The first is how to get the AD7730 to handle input voltages
near or below ground and the second is how to take the 10 V
excitation voltage which appears across the bridge and generate
a suitable reference voltage for the AD7730. The circuit of Figure
25 attempts to address these two issues simultaneously.
The AD7730’s analog and digital supplies can be split such that
AVDD and DVDD can be at separate potentials and AGND and
DGND can also be at separate potentials. The only stipulation
is that AVDD or DVDD must not exceed the AGND by 5.5 V.
In Figure 25, the DVDD is operated at +3 V, which allows the
AGND to go down to –2.5 V with respect to system ground.
This means that all logic signals to the part must not exceed 3 V
with respect to system ground. The AVDD is operated at +2.5 V
with respect to system ground.
The bridge is excited with 10 V across its inputs. The output of
the bridge is biased around the midpoint of the excitation volt-
ages which in this case is system ground or 0 V. In order for the
common-mode voltage of the analog inputs to sit correctly, the
AGND of the AD7730 must be biased below system ground by
a minimum of 1.2 V. The 10 V excitation voltage must be re-
duced to 5 V before being applied as the reference voltage for
the AD7730.
The resistor string R1, R2 and R3, takes the 10 V excitation
voltage and generates differential voltage of nominally 5 V.
Amplifiers A1 and A2 buffer the resistor string voltages and
provide the AVDD and AGND voltages as well as the REF IN(+)
and REF IN(–) voltages for the AD7730. The differential
reference voltage for the part is +5 V. The AD7730 retains its
ratiometric operation with this reference voltage varying in sym-
pathy with the analog input voltage.
The values of the resistors in the resistor string can be changed
to allow a larger DVDD voltage. For example, if R1 = 3 k
Ω,
R2 = 10 k
Ω and R3 = 7 kΩ, the AVDD and AGND voltages
become +3.5 V and –1.5 V respectively. This allows the AD7730
to be used with a +3.6 V DVDD voltage while still allowing the
analog input range to be within the specified common-mode
range.
An alternate scheme to this is to generate the AVDD and AGND
voltages from regulators or Zener diodes driven from the +5 V
and –5 V supplies respectively. The reference voltage for the
part would be generated in the same manner as just outlined but
amplifiers A1 and A2 would not be required to buffer the volt-
ages as they are now only driving the reference pins of the
AD7730. However, care must be taken in this scheme to ensure
that the REF IN(+) voltage does not exceed AVDD and that the
REF IN(–) voltage does not go below AGND.
+5V
–5V
SIGMA-
DELTA
MODULATOR
DVDD
AD7730
6-BIT
DAC
SERIAL INTERFACE
AND CONTROL LOGIC
REGISTER BANK
CLOCK
GENERATION
PROGRAMMABLE
DIGITAL
FILTER
SIGMA-DELTA A/D CONVERTER
BUFFER
PGA
STANDBY
SYNC
MCLK IN
MCLK OUT
SCLK
CS
DIN
DOUT
RESET
RDY
POL
DGND
MUX
CALIBRATION
MICROCONTROLLER
+
IN+
OUT–
IN–
OUT+
REF IN(+)
AVDD
AIN1(+)
AIN1(–)
SYSTEM
GROUND
+3V
A1
A2
+5V
–5V
+5V
–5V
R1
5k
R2
10k
R3
5k
1/2 OP284
OR 1/2 OP213
1/2 OP284
OR 1/2 OP213
REF IN(–)
AGND
ALL VOLTAGE VALUES ARE WITH
RESPECT TO SYSTEM GROUND.
+/–
REV. B
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