参数资料
型号: FDD5612
厂商: Fairchild Semiconductor
文件页数: 2/5页
文件大小: 0K
描述: MOSFET N-CH 60V 5.4A DPAK
产品培训模块: High Voltage Switches for Power Processing
标准包装: 1
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 60V
电流 - 连续漏极(Id) @ 25° C: 5.4A
开态Rds(最大)@ Id, Vgs @ 25° C: 55 毫欧 @ 5.4A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 11nC @ 10V
输入电容 (Ciss) @ Vds: 660pF @ 30V
功率 - 最大: 1.6W
安装类型: 表面贴装
封装/外壳: TO-252-3,DPak(2 引线+接片),SC-63
供应商设备封装: TO-252-3
包装: 标准包装
其它名称: FDD5612DKR
Electrical Characteristics
T A = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
Drain-Source Avalanche Ratings (Note 1)
W DSS
Single Pulse Drain-Source
V DD = 30 V,
I D = 5.4 A
90
mJ
Avalanche Energy
I AR
Maximum Drain-Source Avalanche
5.4
A
Current
Off Characteristics
BV DSS
? BV DSS
? T J
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
V GS = 0 V, I D = 250 μ A
I D = 250 μ A, Referenced to 25 ° C
60
62
V
mV/ ° C
I DSS
I GSSF
I GSSR
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
V DS = 48 V,
V GS = 20 V,
V GS = –20 V
V GS = 0 V
V DS = 0 V
V DS = 0 V
1
100
–100
μ A
nA
nA
On Characteristics
(Note 2)
V GS(th)
Gate Threshold Voltage
V DS = V GS ,
I D = 250 μ A
1
2.4
3
V
? V GS(th)
? T J
Gate Threshold Voltage
Temperature Coefficient
I D = 250 μ A, Referenced to 25 ° C
–6
mV/ ° C
R DS(on)
I D(on)
Static Drain–Source
On–Resistance
On–State Drain Current
V GS = 10 V, I D = 5.4 A
V GS = 6 V, I D = 5 A
V GS = 10 V, I D = 5.4 A, T J = 125 ° C
V GS = 10 V, V DS = 5 V
20
36
42
64
55
64
103
m ?
A
g FS
Forward Transconductance
V DS = 5 V,
I D = 5.4 A
15
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = 30 V,
f = 1.0 MHz
V GS = 0 V,
660
79
36
pF
pF
pF
Switching Characteristics
(Note 2)
t d(on)
t r
t d(off)
t f
Q g
Q gs
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
V DD = 30 V,
V GS = 10 V,
V DS = 30 V,
V GS = 10 V
I D = 1 A,
R GEN = 6 ?
I D = 5.4 A,
8
4
24
4
7.5
2.5
16
8
38
8
11
ns
ns
ns
ns
nC
nC
Q gd
Gate–Drain Charge
3
nC
Drain–Source Diode Characteristics and Maximum Ratings
I S
Maximum Continuous Drain–Source Diode Forward Current
2.7
A
V SD
Drain–Source Diode Forward
Voltage
V GS = 0 V, I S = 2.7 A
(Note 2)
0.8
1.2
V
Notes:
1. R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the drain tab.
R θ JA is the guaranteed design while R θ JA is determined by the user’s design. R θ JA has been used to determine some of the maximum ratings.
a) R θ JA = 40oC/W when
mounted on a 1in2 pad of
2oz copper.
b) R θ JA = 96oC/W when
mounted on a 0.076 in 2
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300 μ s, Duty Cycle < 2.0%
FDD5612 Rev C1(W)
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