参数资料
型号: FDG410NZ
厂商: Fairchild Semiconductor
文件页数: 4/7页
文件大小: 0K
描述: MOSFET N-CH SINGLE 20V SC70-6
标准包装: 3,000
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 20V
电流 - 连续漏极(Id) @ 25° C: 2.2A
开态Rds(最大)@ Id, Vgs @ 25° C: 70 毫欧 @ 2.2A,4.5V
Id 时的 Vgs(th)(最大): 1V @ 250µA
闸电荷(Qg) @ Vgs: 7.2nC @ 4.5V
输入电容 (Ciss) @ Vds: 535pF @ 10V
功率 - 最大: 380mW
安装类型: 表面贴装
封装/外壳: 6-TSSOP,SC-88,SOT-363
供应商设备封装: SC-70-6
包装: 带卷 (TR)
Typical Characteristics T J = 25 °C unless otherwise noted
5
4
3
I D = 2.2 A
V DD = 5 V
1000
C iss
2
1
V DD = 10 V
V DD = 15 V
100
f = 1 MHz
V GS = 0 V
C oss
C rss
0
0
1
2
3
4
5
6
10
0.1
1
10
20
10
10
Q g , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
10
0.1 ms
5
3
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance vs Drain
to Source Voltage
V GS = 0 V
10
10
10
1
0.1
THIS AREA IS
LIMITED BY r DS(on)
SINGLE PULSE
T J = MAX RATED
R θ JA = 333 o C/W
1 ms
10 ms
100 ms
10 s
1s
1
-1
-3
T J = 125 o C
T J = 25 o C
10
0.01
0.01
0.1
T A = 25 o C
1
10
DC
100
-5
0
2
4
6
8
10
12
14
100
10
V DS , DRAIN to SOURCE VOLTAGE (V)
Figure 9. Forward Bias Safe
Operating Area
V GS = 4.5 V
V GS, GATE TO SOURCE VOLTAGE (V)
Figure 10. Gate Leakage Current vs Gate to Source
Voltage
SINGLE PULSE
R θ JA = 333 o C/W
T A = 25 o C
1
10
10
10
10
0.1
-4
-3
-2
-1
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
?2009 Fairchild Semiconductor Corporation
FDG410NZ Rev . B
4
www.fairchildsemi.com
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