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参数资料
| 型号： | FDMC8030 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/7页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 40V DUAL 8-MLP |
| 标准包装： | 3,000 |
| 系列： | PowerTrench® |
| FET 型： | 2 个 N 沟道（双） |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 40V |
| 电流 - 连续漏极(Id) @ 25° C： | 12A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 10 毫欧 @ 12A，10V |
| Id 时的 Vgs(th)（最大）： | 2.8V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 30nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 1975pF @ 20V |
| 功率 - 最大： | 800mW |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-PowerWDFN |
| 供应商设备封装： | 8-MLP（3x3） |
| 包装： | 带卷 (TR) |
Electrical Characteristics T J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Δ BV DSS
Δ T J
I DSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
I D = 250 μ A, V GS = 0 V
I D = 250 μ A, referenced to 25 °C
V DS = 32 V, V GS = 0 V
40
19
1
V
mV/°C
μ A
I GSS
Gate to Source Leakage Current, Forward V GS = 12 V, V DS = 0 V
100
nA
On Characteristics
V GS(th)
Δ V GS(th)
Δ T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25 °C
1.0
1.5
-5
2.8
V
mV/°C
V GS = 10 V, I D = 12 A
8
10
r DS(on)
Static Drain to Source On Resistance
V GS = 4.5 V, I D = 10 A
V GS = 3.2 V, I D = 4 A
10
19
14
28
m Ω
V GS = 10 V, I D = 12 A
T J = 125 °C
13
16
g FS
Forward Transconductance
V DD = 5 V, I D = 12 A
57
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 20 V, V GS = 0 V
f = 1MHz
1462
321
20
0.9
1975
430
30
2.5
pF
pF
pF
Ω
Switching Characteristics
t d(on)
Turn-On Delay Time
7
13
ns
t r
t d(off)
t f
Rise Time
Turn-Off Delay Time
Fall Time
V DD = 20 V, I D = 12 A
V GS = 10 V, R GEN = 6 Ω
3
19
3
10
33
10
ns
ns
ns
Q g(TOT)
Q gs
Total Gate Charge
Total Gate Charge
Gate to Source Charge
V GS = 0 V to 10 V
V GS = 0 V to 5 V
V DD = 20 V
I D = 12 A
21
12
2.8
30
17
nC
nC
nC
Q gd
Gate to Drain “Miller” Charge
2.5
nC
Drain-Source Diode Characteristics
V SD
t rr
Q rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V GS = 0 V, I S = 12 A
I F = 12 A, di/dt = 100 A/ μ s
(Note 2)
0.83
25
9
1.2
40
18
V
ns
nC
NOTES:
1. R θ JA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R θ JC is guaranteed by design while R θ CA is determined by
the user's board design.
a. 65 °C/W when mounted on
a 1 in 2 pad of 2 oz copper
b.155 °C/W when mounted on
a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μ s, Duty cycle < 2.0 %.
3. E AS of 21 mJ is based on starting T J = 25 o C, L = 0.3 mH, I AS = 12 A, V DD = 36 V, V GS = 10 V. 100% tested at L = 3 mH, I AS = 5 A.
4. As an N-ch device, the negative V gs rating is for low duty cycle pulse occurence only. No continuous rating is implied.
?2011 Fairchild Semiconductor Corporation
FDMC8030 Rev.C1
2
www.fairchildsemi.com
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