参数资料
型号: FDME905PT
厂商: Fairchild Semiconductor
文件页数: 4/6页
文件大小: 0K
描述: MOSFET P-CH 12V 6-UMLP
标准包装: 1
系列: PowerTrench®
FET 型: MOSFET P 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 12V
电流 - 连续漏极(Id) @ 25° C: 8A
开态Rds(最大)@ Id, Vgs @ 25° C: 22 毫欧 @ 8A,4.5V
Id 时的 Vgs(th)(最大): 1V @ 250µA
闸电荷(Qg) @ Vgs: 20nC @ 4.5V
输入电容 (Ciss) @ Vds: 2315pF @ 6V
功率 - 最大: 700mW
安装类型: 表面贴装
封装/外壳: *
供应商设备封装: *
包装: 标准包装
其它名称: FDME905PTFSDKR
Typical Characteristics T J = 25 °C unless otherwise noted
4.5
3000
I D = -8 A
V DD = -5 V
C iss
3.0
V DD = -6 V
1000
C oss
1.5
V DD = -7 V
f = 1 MHz
V GS = 0 V
C rss
0.0
0
4
8
12
16
100
0.1
1
10
20
Q g , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
100
300
-V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance vs Drain
to Source Voltage
SINGLE PULSE
R θ JA = 175 C/W
T A = 25 C
10
1
100 μ s
1 ms
10 ms
100
o
o
0.1
0.01
THIS AREA IS
LIMITED BY r DS(on)
SINGLE PULSE
TJ = MAX RATED
R θ JA = 175 o C/W
TA = 25 o C
100 ms
1s
10 s
DC
10
1
10
10
10
0.001
0.1
1
10
30
0.5 -4
10
-3
-2
-1
1
10
100
1000
2
-V DS , DRAIN to SOURCE VOLTAGE (V)
Figure 9. Forward Bias Safe
Operating Area
t, PULSE WIDTH (s)
Figure 10. Single Pulse Maximum
Power Dissipation
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
P DM
t 1
R θ JA = 175 C/W
0.01
SINGLE PULSE
o
t 2
NOTES:
DUTY FACTOR: D = t 1 /t 2
PEAK T J = P DM x Z θ JA x R θ JA + T A
10
10
10
10
0.001
-4
-3
-2
-1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Junction-to-Ambient Transient Thermal Response Curve
?2011 Fairchild Semiconductor Corporation
FDME905PT Rev.C4
4
www.fairchildsemi.com
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