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| 型号： | FDMS86540 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/7页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 60V 20A 8-PQFN |
| 标准包装： | 3,000 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 标准 |
| 漏极至源极电压(Vdss)： | 60V |
| 电流 - 连续漏极(Id) @ 25° C： | 20A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 3.4 毫欧 @ 20A，10V |
| Id 时的 Vgs(th)（最大）： | 4V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 90nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 6435pF @ 30V |
| 功率 - 最大： | 2.5W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TDFN 裸露焊盘 |
| 供应商设备封装： | 8-PQFN（5X6），Power56 |
| 包装： | 带卷 (TR) |
Electrical Characteristics T J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
Δ BV DSS
Δ T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0 V
I D = 250 μ A, referenced to 25 °C
V DS = 48 V, V GS = 0 V
V GS = ±20 V, V DS = 0 V
60
28
1
±100
V
mV/°C
μ A
nA
On Characteristics
V GS(th)
Δ V GS(th)
Δ T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25 °C
2
3.2
-11
4
V
mV/°C
V GS = 10 V, I D = 20 A
2.7
3.4
r DS(on)
Static Drain to Source On Resistance
V GS = 8 V, I D = 18.5 A
3.1
4.1
m Ω
V GS = 10 V, I D = 20 A, T J = 125 °C
3.8
4.8
g FS
Forward Transconductance
V DS = 10 V, I D = 20 A
73
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 30 V, V GS = 0 V,
f = 1 MHz
4837
1413
50
1.0
6435
1880
90
pF
pF
pF
Ω
Switching Characteristics
t d(on)
Turn-On Delay Time
28
45
ns
t r
t d(off)
t f
Q g
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
V DD = 30 V, I D = 20 A,
V GS = 10 V, R GEN = 6 Ω
V GS = 0 V to 10 V
16
32
7.2
65
29
52
15
90
ns
ns
ns
nC
Q g
Q gs
Total Gate Charge
Gate to Source Charge
V GS = 0 V to 8 V
V DD = 30 V,
I D = 20 A
53
23
75
nC
nC
Q gd
Gate to Drain “Miller” Charge
12
nC
Drain-Source Diode Characteristics
V SD
t rr
Q rr
t rr
Q rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
V GS = 0 V, I S = 2.1 A
V GS = 0 V, I S = 20 A
I F = 20 A, di/dt = 100 A/ μ s
I F = 20 A, di/dt = 300 A/ μ s
(Note 2)
(Note 2)
0.70
0.79
55
41
44
76
1.2
1.3
88
66
70
122
V
ns
nC
ns
nC
Notes :
1. R θ JA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R θ JC is guaranteed by design while R θ CA is determined by
the user's board design.
a) 50 °C/W when mounted on a
1 in 2 pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μ s, Duty cycle < 2.0%.
3. Starting T J = 25 ° C, L = 0.3 mH, I AS = 39 A, V DD = 54 V, V GS = 10 V. 100% test at L = 0.1 mH, I AS = 57 A.
4. Pulse Id limited by junction temperature, td ≤ 100 μ s, please refer to SOA curve for more details.
b) 125 °C/W when mounted on a
minimum pad of 2 oz copper.
?2012 Fairchild Semiconductor Corporation
FDMS86540 Rev. C3
2
www.fairchildsemi.com
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