参数资料
型号: FDP8447L
厂商: Fairchild Semiconductor
文件页数: 2/6页
文件大小: 0K
描述: MOSFET N-CH 40V 12A TO-220
产品目录绘图: MOSFET TO-220 Pkg
标准包装: 400
系列: PowerTrench®
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 40V
电流 - 连续漏极(Id) @ 25° C: 12A
开态Rds(最大)@ Id, Vgs @ 25° C: 8.7 毫欧 @ 14A,10V
Id 时的 Vgs(th)(最大): 3V @ 250µA
闸电荷(Qg) @ Vgs: 49nC @ 10V
输入电容 (Ciss) @ Vds: 2500pF @ 20V
功率 - 最大: 2W
安装类型: 通孔
封装/外壳: TO-220-3
供应商设备封装: TO-220
包装: 管件
产品目录页面: 1607 (CN2011-ZH PDF)
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
? BV DS S
? T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 250 μ A, V GS = 0V
I D = 250 μ A, referenced to 25°C
V DS = 32V,
V GS = ±20V, V DS = 0V
40
34
1
±100
V
mV/°C
μ A
nA
On Characteristics
V GS(th)
? V GS(th )
? T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 250 μ A
I D = 250 μ A, referenced to 25°C
1
1.7
-6
3
V
mV/°C
V GS = 10V, I D = 14A
7.7
8.7
r DS(on)
Static Drain to Source On Resistance
V GS = 4.5V, I D = 11A
8.9
11.2
m ?
V GS = 10V, I D = 14A, T J = 125°C
12.1
13.7
g FS
Forward Transconductance
V DD = 5V, I D = 14A
74
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 20V, V GS = 0V,
f = 1MHz
f = 1MHz
1880
245
150
1.4
2500
325
225
pF
pF
pF
?
Switching Characteristics
t d(on)
t r
t d(off)
t f
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
V DD = 20V, I D = 14A,
V GS = 10V, R GEN = 6 ?
9
7
28
4
18
14
45
10
ns
ns
ns
ns
Q g
Q g
Q gs
Total Gate Charge
Total Gate Charge
Gate to Source Charge
V GS = 0V to 10V
V GS = 0V to 5V
V DD = 20V,
I D = 14A
35
19
4.7
49
27
nC
nC
nC
Q gd
Gate to Drain “Miller” Charge
6.2
nC
Drain-Source Diode Characteristics
V SD
Source to Drain Diode Forward Voltage
V GS = 0V, I S = 14A
(Note 2)
0.8
1.2
V
t rr
Q rr
Reverse Recovery Time
Reverse Recovery Charge
I F = 14A, di/dt = 100A/ μ s
28
22
42
33
ns
nC
NOTES:
1. R θ JA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R θ JC is guaranteed by design while R θ JA is determined by the user ’s board design.
2. Pulse Test: Pulse Width < 30 0 μ s, Duty cycle < 2.0%.
3. Starting T J = 25°C, L = 1mH, I AS = 17.5A, V DD = 40V, V GS = 10V.
?2007 Fairchild Semiconductor Corporation
FDP8447L Rev.B
2
www.fairchildsemi.com
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