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| 型号： | FDS8672S |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/7页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 30V 18A 8-SOIC |
| 产品培训模块： | High Voltage Switches for Power Processing |
| 产品变化通告： | Mold Compound Change 12/Dec/2007 |
| 产品目录绘图： | Power MOSFET, 8-SOP, SO-8 |
| 标准包装： | 1 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 30V |
| 电流 - 连续漏极(Id) @ 25° C： | 18A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 4.8 毫欧 @ 18A，10V |
| Id 时的 Vgs(th)（最大）： | 3V @ 1mA |
| 闸电荷(Qg) @ Vgs： | 41nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 2670pF @ 15V |
| 功率 - 最大： | 1W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 标准包装 |
| 产品目录页面： | 1603 (CN2011-ZH PDF) |
| 其它名称： | FDS8672SDKR |
Electrical Characteristics T J = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV DSS
? BV DS S
? T J
I DSS
I GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I D = 1mA, V GS = 0V
I D = 10mA, referenced to 25°C
V DS = 24V, V GS = 0V
V GS = ±20V, V DS = 0V
30
33
500
±100
V
mV/°C
μ A
nA
On Characteristics
V GS(th)
? V GS(th )
? T J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V GS = V DS , I D = 1mA
I D = 10mA, referenced to 25°C
1.0
2.1
-5
3.0
V
mV/°C
V GS = 10V, I D = 18A
3.8
4.8
r DS(on)
Static Drain to Source On Resistance
V GS = 4.5V, I D = 15A
5.3
7.0
m ?
V GS = 10V, I D = 18A, T J = 125°C
5.3
7.8
g FS
Forward Transconductance
V DS = 5V, I D = 18A
78
S
Dynamic Characteristics
C iss
C oss
C rss
R g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V DS = 15V, V GS = 0V,
f = 1MHz
f = 1MHz
2005
985
135
0.6
2670
1310
205
2.0
pF
pF
pF
?
Switching Characteristics
t d(on)
t r
t d(off)
t f
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
V DD = 15V, I D = 18A,
V GS = 10V, R GEN = 6 ?
12
4
26
3
22
10
42
10
ns
ns
ns
ns
Q g
Q g
Q gs
Total Gate Charge
Total Gate Charge
Gate to Source Charge
V GS = 0V to 10V
V GS = 0V to 5V
V DD = 15V,
I D = 18A
29
15
5.5
41
21
nC
nC
nC
Q gd
Gate to Drain “Miller” Charge
3.7
nC
Drain-Source Diode Characteristics
V SD
t rr
Q rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V GS = 0V, I S = 18A
V GS = 0V, I S = 1.8A
I F = 18A, di/dt = 300A/ μ s
0.8
0.4
27
31
1.2
0.7
43
50
V
ns
nC
NOTES:
1. R θ JA is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R θ JC is guaranteed by design while R θ CA is determined by
the user's board design.
a) 50°C/W when mounted on a
1in 2 pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μ s, Duty cycle < 2.0%.
3. Starting T J = 25°C, L = 3mH, I AS = 12A, V DD = 30V, V GS = 10V.
b) 125°C/W when mounted on a
minimum pad.
?2007 Fairchild Semiconductor Corporation
FDS8672S Rev.D2
2
www.fairchildsemi.com
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