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参数资料
| 型号： | FQI27N25TU_F085 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 1/6页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 250V 25.5A I2PAK |
| 标准包装： | 400 |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 标准 |
| 漏极至源极电压(Vdss)： | 250V |
| 电流 - 连续漏极(Id) @ 25° C： | 25.5A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 110 毫欧 @ 12.75A，10V |
| Id 时的 Vgs(th)（最大）： | 5V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 65nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 1800pF @ 25V |
| 功率 - 最大： | 3.13W |
| 安装类型： | 通孔 |
| 封装/外壳： | TO-262-3，长引线，I²Pak，TO-262AA |
| 供应商设备封装： | TO-262 |
| 包装： | 管件 |
January 2014
FQB27N25TM_F085/FQI27N25TU_F085
N-Channel MOSFET
250V, 25.5A, 131m Ω
Features
Typ r DS(on) = 108m Ω at V GS = 10V, I D = 25.5A
Typ Q g(tot) = 45nC at V GS = 10V, I D = 27A
D
UIS Capability
G
S
RoHS Compliant
Qualified to AEC Q101
TO-263AB
D
TO-262AB
Applications
Automotive Engine Control
Powertrain Management
Solenoid and Motor Drivers
Electronic Steering
Integrated Starter/alternator
Distributed Power Architectures and VRM
Primary Switch for 12V Systems
G
S
For current package drawing, please refer to the Fairchild
website at www.fairchildsemi.com/packaging
MOSFET Maximum Ratings T J = 25°C unless otherwise noted
Symbol
V DSS
V GS
Drain to Source Voltage
Gate to Source Voltage
Parameter
Ratings
250
±30
Units
V
V
I D
E AS
P D
Drain Current - Continuous (V GS =10) (Note 1)
Pulsed Drain Current
Single Pulse Avalanche Energy
Power Dissipation
Derate above 25 o C
T C = 25°C
T C = 25°C
(Note 2)
25.5
See Figure3
972
179
1.43
A
mJ
W
W/ o C
T J , T STG Operating and Storage Temperature
R θ JC Thermal Resistance Junction to Case
R θ JA Maximum Thermal Resistance Junction to Ambient
(Note 3)
-55 to + 150
0.7
43
o C
o C/W
o C/W
Package Marking and Ordering Information
Device Marking
FQB27N25TM
FQI27N25TU
Device
FQB27N25TM_F085
FQI27N25TU_F085
Package
TO-263AB
TO-262AB
Reel Size
330mm
Tube
Tape Width
24mm
N/A
Quantity
800 units
50 units
Notes:
1: Current is limited by bondwire configuration.
2: Starting T J = 25°C, L = 4.67mH, I AS = 20.4A, V DD = 100V during inductor charging and V DD = 0V during time in avalanche
3: R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. R θ JC is guaranteed by design while R θ JA is determined by the user's board design. The maximum rating
presented here is based on mounting on a 1 in 2 pad of 2oz copper.
?2013 Fairchild Semiconductor Corporation
FQB27N25TM_F085/QI27N25TU_F085 Rev. C1
1
www.fairchildsemi.com
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